Resistive Memory Cell Array Structure for Stable Set-Reset Switching

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Solution Overview

Problem

Conventional resistive random-access memory (ReRAM) cells face challenges in efficiently switching between set and reset states due to limitations in unipolar and bipolar operation modes, which affect their performance and reliability.

Innovation Solution

A cell array structure is introduced, comprising a semiconductor substrate with specific well regions, isolation structures, and gate structures, along with conductor lines, allowing for improved switching through a 1T1C cell configuration that includes a transistor and a capacitor, enabling efficient unipolar and bipolar operations.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If conventional unipolar or bipolar operation modes are used in ReRAM cells, then the basic switching function is achieved, but the switching efficiency and reliability are limited

Engineering Contradiction:
Improveswitching reliabilityVSAvoidswitching efficiency
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The ReRAM cell is segmented into distinct functional regions: a first region with high oxygen vacancy concentration for filament formation, and a second region with low oxygen vacancy concentration for stable state maintenance. This spatial segmentation allows independent optimization of switching efficiency (in first region) and reliability (in second region), resolving the contradiction between switching efficiency and reliability.

Inventive Principle:
Principle #1Segmentation

2Reliability

If the insulation layer has uniform oxygen vacancy distribution, then the structure is simple, but the control of conducting filaments is imprecise

Engineering Contradiction:
Improvefilament control precisionVSAvoidinsulation layer structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The insulation layer is designed with non-uniform oxygen vacancy distribution, creating regions with different local properties. The first region has high oxygen vacancy concentration to facilitate precise filament formation and control, while the second region has low concentration for stability. This local quality differentiation enables precise filament control without requiring complex overall structure.

Inventive Principle:
Principle #3Local quality

3Adaptability or versatility

If ReRAM cells are configured in conventional architectures, then the manufacturing process is straightforward, but scalable array configurations are limited

Engineering Contradiction:
Improvearray scalabilityVSAvoidmanufacturing complexity
Core Design Contradiction:
Adaptability or versatilityVSEase of manufacture

Solution Approach 1:

The ReRAM cell structure is designed with universal components that can be replicated and scaled: the insulation layer with differentiated regions, electrode configurations, and supporting structures can be consistently implemented across array configurations. This universality enables scalable array implementations while maintaining manufacturing straightforwardness through standardized fabrication processes.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed structure enhances the switching efficiency and reliability of ReRAM cells by allowing precise control of conducting filaments, facilitating stable set and reset states, and enabling scalable array configurations.

Implementation Method 1

the conducting filament 108 within the insulation layer 104 is treated by a redox process

Methodology Applied
Scientific EffectRedox process: Redox Reactions

Data Source

PatentUS12507420B2Resistive memory cell and associated cell array structure
Publication Date: 2025.12.23 EMEMORY TECH INC
  • US12507420B2 patent drawing
  • US12507420B2 patent drawing
  • US12507420B2 patent drawing

AI summary

A resistive memory cell includes a P-well region, an isolation structure, an N-well region, a first gate structure, a second gate structure, a first N-type doped region, a second N-type doped region, a third N-type doped region, a fourth N-type doped region, a word line, a bit line, a conductor line and a program line. The third N-type doped region, the fourth N-type doped region and the N-well region are collaboratively formed as an N-type merged region. The bit line is connected with the first N-type doped region. The word line is connected with a conductive layer of the first gate structure. The conductor line is connected with the second N-type doped region and a conductive layer of the second gate structure. The program line is connected with the N-type merged region.