Resistive Memory Read Circuit Using Snapback Phenomenon
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Solution Overview
Problem
Conventional resistive memory devices face difficulties in accurately and quickly reading data due to small differences in current flow between high and low resistance states, leading to slow operation speeds and large circuit areas in current sensing schemes.
Innovation Solution
An electronic device with a semiconductor memory that utilizes a read circuit to apply a read voltage and sense data by determining the occurrence of a snapback phenomenon in resistive memory cells, where the read voltage is set higher than the threshold for low resistance state and lower than that for high resistance state, utilizing OTS elements and a series of transistors and capacitors to accurately detect voltage changes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If current sensing scheme is used to read data from resistive memory cells, then data can be read, but the difference between current amounts for high and low resistance states is small, leading to slow operation speed and large circuit area
Solution Approach 1:
The patent changes the sensing parameter from current to voltage by applying a read voltage to the selected memory cell and detecting the voltage change caused by the snapback phenomenon. This parameter change enables faster operation speed while maintaining reading accuracy, resolving the contradiction between measurement precision and productivity
2Measurement precision
If current sensing scheme is used to read data from resistive memory cells, then data can be read, but the circuit area becomes large
Solution Approach 1:
The patent changes the sensing approach from current-based to voltage-based detection. By applying a read voltage and detecting voltage changes at the bit line, the circuit can be simplified with fewer components, significantly reducing the circuit area while maintaining data reading accuracy
3Ease of operation
If read voltage is applied to selected memory cell, then data reading is enabled, but the read voltage must be precisely controlled to distinguish between high and low resistance states
Solution Approach 1:
The patent utilizes the snapback phenomenon, where the selection element exhibits a characteristic voltage drop when a threshold voltage is exceeded. By designing the read voltage to be higher than the snapback threshold, the system converts the challenging voltage control requirement into a beneficial detection mechanism: the snapback voltage change itself becomes the signal for reading data, eliminating the need for precise voltage control while maintaining ease of operation
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables accurate and rapid data reading with a simple circuit, providing a high sensing margin and improved operating precision by distinguishing between resistance states based on snapback voltage levels.
Implementation Method 1
sense data by determining whether or not a snapback phenomenon has occurred in the selected memory cell, wherein the read voltage is higher than a level of a first voltage which causes the snapback phenomenon when being applied to both ends of the selected memory cell in the case where data stored in the selected memory cell is first data, and is lower than a level of a second voltage which causes the snapback phenomenon
Data Source
AI summary
A semiconductor memory includes a cell array including a plurality of resistive memory cells arranged in a plurality of columns and a plurality of rows, the plurality of resistive memory cells having a snapback characteristic; and a read circuit configured to apply a read voltage to a memory cell selected among the plurality of resistive memory cells, and sense data stored in the selected memory cell by determining whether or not a snapback phenomenon has occurred in the selected memory cell, wherein the read voltage has a level higher than a level of a first voltage and lower than a level of a second voltage, wherein the snapback phenomenon occurs when the first voltage is applied to the selected memory cell in a case where the selected memory cell stores first data, and wherein the snapback phenomenon occurs when the second voltage is applied to the selected memory cell in a case where the selected memory cell stores second data.