Multi-Layer Resistive Memory Storage Node for Voltage Stability
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Solution Overview
Problem
Current nonvolatile memory devices, such as PRAMs, face challenges in achieving high integration, rapid operating speed, data retention, and low power consumption, with manufacturing difficulties and increased costs due to the use of DRAM equipment, and resistive random access memory devices lack stable operational voltage and on/off resistance ratios.
Innovation Solution
A resistive random access memory device is designed with a storage node comprising a lower electrode, a first layer containing oxygen, sulfur, selenium, or their combinations, and a second layer of copper or silver with lower oxidizing power, forming a switching structure that includes a diode or transistor, and an upper electrode, which enhances the on/off resistance ratio and operational voltage stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a single-layer storage node structure is used, then the device structure is simple, but the operational voltage stability and on/off resistance ratio are insufficient
Solution Approach 1:
The storage node is divided into multiple layers including a lower electrode, a first layer containing oxygen/sulfur/selenium, a second layer with copper or silver, and an upper electrode. This segmentation allows each layer to contribute specific properties that collectively improve operational voltage stability and on/off resistance ratio.
Solution Approach 2:
The storage node employs composite material structure combining different materials with specific properties: the first layer uses materials with high oxidizing power, while the second layer uses materials with lower oxidizing power. This composite approach enables simultaneous achievement of stable operational voltage and high on/off resistance ratio.
2Reliability
If PRAM manufacturing process is used, then nonvolatile memory functionality is achieved, but manufacturing cost increases and productivity decreases
Solution Approach 1:
The storage node structure is designed to be compatible with both DRAM and PRAM manufacturing processes, allowing the same fabrication equipment and工艺流程 to produce nonvolatile memory devices with enhanced performance, thereby improving productivity while maintaining data retention capability.
3Reliability
If conventional storage node materials are used, then manufacturing process is simple, but on/off resistance ratio is insufficient
Solution Approach 1:
Different regions of the storage node are assigned specific material compositions with tailored properties: the first layer contains oxygen/sulfur/selenium for high oxidizing power, while the second layer contains copper or silver with lower oxidizing power. This local quality differentiation optimizes the on/off resistance ratio.
Solution Approach 2:
The material composition parameters are optimized by selecting specific elements with appropriate oxidizing power differences. The first layer uses materials with higher oxidizing power than the second layer, creating ideal conditions for achieving high on/off resistance ratio in the resistive switching device.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed device achieves a more stable operational voltage and increased on/off resistance ratio, improving the performance and manufacturing efficiency of resistive random access memory devices by using a transition metal oxide and a germanium-tellurium-copper compound, allowing for better integration and reduced power consumption.
Implementation Method 1
the second layer being formed of a material having an oxidizing power (or electronegativity) less than that of the first layer
Implementation Method 2
The resistance of the resistive layer varies according to an applied voltage
Data Source
AI summary
A multi-layer storage node, resistive random access memory device and methods of manufacturing the same are provided. The resistive random access memory device includes a switching structure and a storage node connected to the switching structure. The storage node includes a lower electrode, a first layer, a second layer, and an upper electrode that may be sequentially stacked. The first layer may be formed on the lower electrode and includes at least one of oxygen (O), sulfur (S), selenium (Se), tellurium (Te) and combinations thereof. The second layer may be formed on the first layer and includes at least one of copper (Cu), silver (Ag) and combinations thereof. The second layer may be formed of a material having an oxidizing power less than that of the first layer. The upper electrode may be formed on the second layer.


