Resistive Memory Device 3D Switch Structure Integration
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Solution Overview
Problem
Conventional resistive memory devices face a trade-off between integration density and switching current, where increasing the contact area to enhance switching current reduces integration density, and vice versa.
Innovation Solution
A resistive memory device with a three-dimensional switch structure is developed, featuring a bottom electrode, an insulating layer with a hole exposing the electrode, a resistance layer and intermediate layer formed within the hole, and a switch structure on the intermediate layer, allowing for a stable switching current while maintaining high integration density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If the contact area between the diode and the memory device is increased to increase the switching current, then the switching current is improved, but the size of the memory device must be increased, thereby reducing the integration density
Solution Approach 1:
The patent transitions from a planar contact structure to a three-dimensional vertical contact structure by forming a hole through the insulating layer to expose the bottom electrode. This vertical arrangement allows the switch structure to contact both the top and bottom electrodes through the resistance layer, effectively increasing the contact area without expanding the planar device footprint, thereby resolving the contradiction between switching current and integration density.
2Use of energy by moving object
If the size of the unit cell is reduced to reduce reset current for lower power consumption, then the power consumption is improved, but the contact area is reduced, making it difficult to achieve sufficient switching current
Solution Approach 1:
By forming a vertical hole structure that penetrates through the insulating layer and contacts the bottom electrode, the patent enables the switch structure to establish electrical contact with both top and bottom electrodes through the resistance layer. This three-dimensional configuration allows sufficient switching current to be achieved even in reduced-size unit cells, thereby enabling low power consumption without sacrificing switching performance.
Solution Approach 2:
The switch structure is nested within the vertical hole structure, with the resistance layer and intermediate layer forming concentric layers around the contact path. This nested arrangement maximizes the utilization of the vertical space within the unit cell, allowing the contact area to be effectively increased without increasing the planar dimensions, thus maintaining low power consumption while achieving sufficient switching current.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The three-dimensional switch structure enables a stable switching current with reduced current density requirements, maintaining high integration density without increasing the device size, and allows for controlled contact area adjustment during manufacturing.
Implementation Method 1
RRAM operates based on the variable resistance characteristics of a transition metal oxide according to states thereof
Data Source
AI summary
Provided is a resistive memory device and a method of manufacturing the resistive memory device that includes a bottom electrode, an insulating layer that is formed on the bottom electrode and has a hole that exposes the bottom electrode, a resistance layer and an intermediate layer which are formed in the hole, a switch structure formed on a surface of the intermediate layer, and an upper electrode formed on the switch structure.