Resistive Memory Tile Parallel Write Operations
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Solution Overview
Problem
Resistive memory devices face inefficiencies during write operations due to limitations in current consumption and the number of memory cells that can be written to simultaneously, which affects their performance and power usage.
Innovation Solution
The implementation of a method where a resistive memory device performs simultaneous set and reset write operations across multiple tiles, optimizing current usage by applying electric currents from different lines to different tiles, allowing for increased data storage within the limits of allowable current consumption.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If write operations are performed on memory cells using conventional sequential methods, then current consumption per operation is controlled, but the total time required to write to multiple memory cells increases and overall productivity decreases
Solution Approach 1:
The memory device is divided into multiple independent tiles (first tile, second tile, etc.), each capable of being written to independently. This segmentation allows parallel write operations to be performed on different tiles simultaneously, increasing productivity without proportionally increasing current consumption, as each tile receives a controlled portion of the total current.
Solution Approach 2:
Multiple write operations on different tiles are merged into a single simultaneous operation. The control logic coordinates set and reset write operations across multiple tiles at the same time, effectively combining what would otherwise be sequential operations into one parallel execution stage, thereby improving write speed while managing current distribution.
2Productivity
If the number of memory cells written to simultaneously is increased, then productivity improves, but current consumption exceeds allowable limits
Solution Approach 1:
Different tiles receive different write operations (set or reset) based on local data requirements. The control logic determines which tiles need set operations and which need reset operations, applying appropriate current directions locally to each tile. This allows maximum parallelism while keeping total current consumption within limits by optimizing which tiles are written to and in what direction.
Solution Approach 2:
The system dynamically adjusts which tiles are written to and in what direction based on the data being written. The control logic can flexibly assign set or reset operations to different tiles depending on the write command, allowing optimal utilization of current resources while maintaining high productivity through parallel operations.
3Loss of time
If set and reset write operations are performed separately on different tiles, then current consumption per operation is controlled, but the total number of operation cycles increases and time efficiency decreases
Solution Approach 1:
Set write operations on some tiles and reset write operations on other tiles are merged into a single simultaneous operation cycle. The control logic coordinates these complementary operations to execute at the same time, effectively halving the number of operation cycles needed compared to sequential execution, thereby reducing time loss while maintaining controlled current consumption through parallel distribution.
Solution Approach 2:
The system maintains continuous useful action by ensuring that while some tiles are undergoing set operations, other tiles are simultaneously undergoing reset operations. This eliminates idle time between operations and keeps the write pipeline fully utilized, maximizing productivity without requiring increased current beyond what would be used for single-tile operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the efficiency of write operations by increasing the number of memory cells that can be written to while maintaining efficient current usage, thereby improving data storage capacity and reducing power consumption.
Implementation Method 1
Resistive memory devices face inefficiencies during write operations due to limitations in current consumption
Implementation Method 2
an electric current flowing from the plurality of second lines toward the plurality of first lines may be applied to the memory cells included in the remaining tiles on which the reset write operation is performed
Data Source
AI summary
A method of writing data in a resistive memory device having a memory cell array divided into first and second tiles includes; performing a first simultaneous write operation by performing a set write operation performed on resistive memory cells of the first tile while simultaneously performing a reset write operation on resistive memory cells of the second tile in response to the write command, and performing a second simultaneous write operation by performing a reset write operation on resistive memory cells of the first tile while simultaneously performing a set write operation on resistive memory cells of the second tile in response to the write command.