Resistive Memory Voltage Selector Circuit IR Drop Mitigation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional resistive memory cells exhibit uneven quality due to parasitic IR drop effects during forming and initial reset operations, leading to reduced reliability in reading and writing processes.
Innovation Solution
A resistive memory apparatus with a voltage selector circuit that applies voltage through multiple signal transmission paths, ensuring identical IR drops and different signal transmission directions for each pair of paths, thereby mitigating uneven voltage supply across memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional voltage applying method is used during forming and initial reset operations, then the operations can be completed, but parasitic IR drop effects cause uneven quality across memory cells at different locations
Solution Approach 1:
The voltage selector circuit divides the memory cell array into multiple banks and segments the voltage applying operation into multiple phases. Different groups of memory cells are accessed through different signal transmission paths in different phases, ensuring that memory cells at different locations experience comparable IR drops within each phase, thereby improving quality uniformity across the entire array.
Solution Approach 2:
The patent applies reverse bias to memory cells in a specific sequence that compensates for the IR drop gradient. By inverting the conventional approach and applying voltages in a compensating sequence, the method offsets the parasitic voltage drops, ensuring that memory cells at different locations receive effectively equal net voltages during forming and initial reset operations.
2Reliability
If voltage is applied through single signal transmission path, then the circuit structure is simple, but IR drop effects cause uneven voltage supply across memory cells
Solution Approach 1:
The voltage selector circuit is segmented into multiple independent voltage applying circuits, each capable of driving a group of memory cells through dedicated signal transmission paths. This segmentation allows simultaneous or sequential voltage application through multiple paths with different IR drop characteristics, ensuring consistent voltage supply while managing complexity through modular circuit design.
Solution Approach 2:
The voltage applying operation is divided into multiple periodic phases, where different groups of memory cells are accessed in alternating sequences. During each phase, specific banks are activated through specific signal transmission paths, allowing the system to manage multiple paths systematically and maintain voltage consistency without requiring all paths to be active simultaneously, thus controlling circuit complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach improves the reliability of resistive memory cells by ensuring consistent voltage application across all cells, reducing the impact of IR drop effects and enhancing the overall quality of the memory cell array during reading and writing operations.
Implementation Method 1
The distances can derive a parasitic IR drop effect. After the forming procedure and/or the initial reset operation are completed, the memory cells at the different locations will show different characteristics due to the IR drop effect
Data Source
AI summary
A resistive memory apparatus including a memory cell array and a voltage selector circuit is provided. The memory cell array includes a plurality of memory cells. The voltage selector circuit is coupled to the memory cell array. The voltage selector circuit performs a voltage applying operation on the memory cells via a plurality of different signal transmission paths. Each of the signal transmission paths passes one of the memory cells. IR drops of two of the signal transmission paths are substantially identical, and signal transmission directions thereof are different. In addition, an operating method of a resistive memory apparatus is also provided.