Resistive Memory Cell Read Voltage Stabilization
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Solution Overview
Problem
Existing nonvolatile memory devices face challenges in maintaining security and reliability, particularly in high-temperature environments, due to fluctuations in resistance values and leakage currents, which affect the reproducibility of PUF data and the readability of FHD data.
Innovation Solution
A nonvolatile memory device with resistive memory cells that utilize a second read voltage higher than the first read voltage but lower than the forming pulse voltage to stabilize resistance value information, allowing for improved detection of resistance variations in both initial and variable states, enhancing the reliability and security of PUF and FHD data.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a first read voltage is used to read resistive memory cells in the variable state, then the memory cells can be read, but the resistance value information becomes unstable in high-temperature environments
Solution Approach 1:
The patent changes the read voltage parameter from the first read voltage to a second read voltage that is higher than the first but lower than the forming pulse voltage. This parameter change stabilizes the resistance value information by reducing fluctuations caused by leakage currents in high-temperature environments, thereby improving reliability without causing unwanted state transitions in the memory cells.
2Reliability
If a higher read voltage is applied to stabilize resistance values, then resistance value information becomes more stable, but the risk of changing memory cell state increases
Solution Approach 1:
The patent carefully selects the second read voltage to be higher than the first read voltage but explicitly lower than the forming pulse voltage. This controlled parameter change achieves two goals: it stabilizes resistance values by reducing thermal fluctuation effects, while simultaneously preventing the voltage from reaching the threshold that would trigger unwanted state transitions or filament formation in the memory cells.
Solution Approach 2:
The patent applies a voltage that is partially excessive compared to the first read voltage (to overcome thermal noise and stabilize measurements) but deliberately kept below the excessive threshold that would cause harmful effects. This partial application of higher voltage achieves the needed stability without crossing into the dangerous zone of state transitions.
3Reliability
If the circuit is designed to handle resistance variations, then security is improved, but the circuit scale and area increase
Solution Approach 1:
The patent addresses security concerns by changing the read voltage parameter rather than adding complex circuitry. By using the second read voltage, the system inherently stabilizes resistance measurements, which improves the reliability and security of both PUF and FHD data without requiring additional security circuits or increasing the overall device complexity.
Solution Approach 2:
The read circuit is designed to handle both initial state and variable state memory cells using a single voltage selection mechanism. The same read circuit infrastructure can operate with either the first or second read voltage depending on the memory cell state, providing multi-functionality without duplicating circuitry. This universal approach maintains security while avoiding increased device area.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach stabilizes resistance value information, improving the reproducibility of PUF data and enabling secure reading of FHD data even in high-temperature conditions, while reducing the circuit scale and area requirements, thus enhancing overall security and reliability.
Implementation Method 1
The resistance detection circuit applies a second read voltage to the at least one resistive memory cell to obtain the resistance value information
Data Source
AI summary
A nonvolatile memory device includes: resistive memory cells each of which takes either a variable state or an initial state, the resistive memory cells including at least one resistive memory cell in the initial state; and a read circuit that includes a resistance detection circuit that obtains resistance value information of the at least one resistive memory cell, and a data generation circuit that generates digital data corresponding to the resistance value information. The resistance detection circuit applies a second read voltage to the at least one resistive memory cell to obtain the resistance value information. The second read voltage is larger than a first read voltage and smaller than a voltage of a forming pulse that is an electrical stress for changing from the initial state to the variable state. The first read voltage is for reading a resistive memory cell in the variable state.