Resistive Memory Cell Resistance Window Recovery
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Solution Overview
Problem
Resistive memory cells face endurance limitations due to the complementary switching phenomenon, which narrows or eliminates the resistance window, making it difficult to distinguish between high and low resistance states, thereby affecting memory capability.
Innovation Solution
Applying an over reset voltage difference within the reset complementary switching voltage range, followed by a set voltage difference to increase compliance current, and performing a reset operation to recover the resistance window.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an overly high voltage is used to perform the reset operation, then the reset operation can be completed, but the current of the resistive memory cell that should be in a low current state increases (complementary switching phenomenon)
Solution Approach 1:
The patent applies a preliminary forming operation before the reset operation to prepare the resistive memory cell. This preliminary action modifies the initial state of the cell, preventing the complementary switching phenomenon from occurring during subsequent reset operations, thereby maintaining reliable operation without harmful side effects
Solution Approach 2:
The patent changes the voltage parameter applied during reset operations. Instead of using overly high voltage that causes complementary switching, the patent uses optimized voltage levels within a specific range that achieves reset operation completion while avoiding the harmful increase in low current state current
2Productivity
If the reset operation is performed repeatedly, then the memory operations can be completed, but the resistance window narrows or disappears (endurance limitation)
Solution Approach 1:
The patent applies a preliminary forming operation before reset operations to prepare the resistive memory cell structure. This preliminary action creates a more stable resistance window that can withstand repeated reset operations, allowing high productivity while maintaining reliable resistance window distinction between high and low current states
Solution Approach 2:
The patent uses the forming operation as a cushioning measure that protects the resistance window from degradation during repeated reset operations. This beforehand cushioning prevents the narrowing or disappearance of the resistance window, ensuring long-term reliability while maintaining high operation throughput
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The resistance window recovery method extends the endurance of resistive memory cells by effectively preventing the complementary switching phenomenon, ensuring reliable data retention.
Implementation Method 1
RRAM can retain or store values by changing the resistance state
Implementation Method 2
the resistance window (or called voltage window) of the reset operation of the memory cell will be narrowed (or even disappear)
Data Source
AI summary
A resistive memory and a resistance window recovery method for a resistive memory cell thereof are provided. During a first period, an over reset voltage difference is applied between a top electrode and a bottom electrode of the resistive memory cell, wherein the over reset voltage difference falls in a reset complementary switching (reset-CS) voltage range of the resistive memory cell. During a second period, a set voltage difference is applied between the top electrode and the bottom electrode of the resistive memory cell to increase a compliance current of the resistive memory cell. During a third period, a reset operation is performed on the resistive memory cell.