Multi-Level Resistive Memory Write Control via Resistance Verification
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Solution Overview
Problem
Current multi-level variable resistive memory devices face challenges in accurately writing data values due to variations in resistance levels, leading to potential read errors and reduced data storage reliability.
Innovation Solution
The method involves reading the resistance of reference cells, applying a write current to a variable resistive memory cell, verifying if the actual resistance falls within an intended resistance window, and adjusting the write current based on verification results to ensure precise data writing, utilizing a temperature compensation circuit and verification sense amplifier to manage the write current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If a fixed write current is applied to the variable resistive memory cell, then the write operation is simple and fast, but the actual resistance may not fall within the intended resistance window due to variations in resistance levels
Solution Approach 1:
The patent implements a feedback mechanism where the actual resistance of the memory cell is measured after write current application, and this measurement is used to adjust subsequent write current pulses. The system continuously monitors whether the resistance falls within the intended window and modifies the write current accordingly to achieve precise resistance control.
Solution Approach 2:
The patent applies preliminary write current pulses before the final write operation to pre-condition the memory cell resistance. By applying initial pulses that bring the resistance close to the target window, the system reduces the complexity and current requirement of the final write pulse while ensuring accurate resistance positioning.
2Reliability
If the write current amount is adjusted based on verification results, then the data writing accuracy is improved, but the write time increases due to re-application of write current
Solution Approach 1:
The patent applies multiple write current pulses with varying amounts rather than a single excessive pulse. By using several partial pulses with optimized current levels based on verification results, the system achieves reliable data writing while minimizing total write time compared to using one large safety-margin pulse.
Solution Approach 2:
The patent employs periodic write current pulses separated by verification measurement intervals. This periodic application allows the system to check resistance status and adjust subsequent pulses, achieving reliable writing through controlled repetition rather than continuous current application.
3Measurement precision
If multiple reference cells are used for temperature compensation, then the resistance measurement accuracy is improved, but the device complexity and area increase
Solution Approach 1:
The patent divides the reference cell functionality into multiple separate reference cells rather than using one large reference structure. This segmentation allows for better temperature compensation across different resistance ranges while maintaining compact individual cell sizes, achieving improved measurement precision without proportionally increasing total area.
Data Source
AI summary
Disclosed is a method of driving a multi-level variable resistive memory device. A method of driving a multi-level variable resistive memory device includes supplying a write current to a variable resistive memory cell so as to change resistance of the variable resistive memory cell, verifying whether or not changed resistance enters a predetermined resistance window, the intended resistance window depending on the resistance of reference cells, and supplying a write current having an increased or decreased amount from the write current supplied most recently on the basis of the verification result so as to change resistance of the variable resistive memory cell.