Resistive Phase Interpolation Module for Low-Jitter Delay Lines

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Solution Overview

Problem

Conventional delay line circuits with phase interpolators are sensitive to process variations and temperature changes, leading to time jitter and fighting currents due to non-identical inverter sizes, which affect the precision of phase adjustment and timing delays.

Innovation Solution

A phase interpolation module comprising identical inverter sizes and resistors, where resistors are strategically placed between inverters to equalize signal timing and reduce fighting currents, ensuring the module is insensitive to process variations and maintaining consistent duty cycles across signals.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If non-identical inverter sizes are used in phase interpolation units, then phase adjustment flexibility is improved, but fighting currents are generated and process variation sensitivity increases

Engineering Contradiction:

Improvephase adjustment flexibilityVSAvoidfighting currents

Core Design Contradiction:

Adaptability or versatilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by making each inverter pair (first and second inverters in each phase interpolation unit) have identical sizes locally, while different phase interpolation units can have different delay characteristics. This local uniformity eliminates fighting currents within each unit while maintaining overall phase adjustment flexibility through the network of multiple units with resistors.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

Resistors are introduced as intermediary elements between the first and second inverters in each phase interpolation unit. These resistors mediate the signal paths to equalize timing delays without requiring non-identical inverter sizes, thereby eliminating fighting currents while preserving phase adjustment capability through controlled impedance matching.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Adaptability or versatility

If non-identical inverter sizes are used in phase interpolation units, then phase adjustment flexibility is improved, but sensitivity to process variations increases

Engineering Contradiction:

Improvephase adjustment flexibilityVSAvoidinsensitivity to process variations

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The patent ensures local uniformity by making inverter pairs identical within each phase interpolation unit, which eliminates process variation sensitivity at the local level. The overall system maintains adaptability through the configuration of multiple such units with resistive coupling, where each unit's uniformity contributes to global reliability.

Inventive Principle:

Principle #3Local quality

Solution Approach 2:

The patent applies homogeneity by using identical inverter sizes and matching resistor values within each phase interpolation unit. This homogeneous design ensures that all signal paths experience similar process variations, making the system's phase adjustment characteristics predictable and insensitive to manufacturing tolerances while maintaining flexibility through the network architecture.

Inventive Principle:

Principle #33Homogeneity

3Reliability

If resistors are added between inverters to equalize timing, then insensitivity to process variations is improved, but device complexity increases

Engineering Contradiction:

Improveinsensitivity to process variationsVSAvoidcircuit complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

Resistors serve as simple intermediary elements that equalize timing delays between inverter pairs. While they add components to the circuit, the resistors are passive elements with straightforward functions, and their addition enables the use of identical inverter sizes, which simplifies the overall design by eliminating the need for complex inverter sizing calculations and reduces sensitivity to process variations.

Inventive Principle:

Principle #24Intermediary (Mediator)

4Manufacturing precision

If digital phase interpolator is used instead of analog, then manufacturing precision is improved, but time jitter in delay compensation elements remains

Engineering Contradiction:

Improvephase definition precisionVSAvoidtime jitter

Core Design Contradiction:

Manufacturing precisionVSObject-generated harmful factors

Solution Approach 1:

The patent employs a digital phase interpolator architecture that replaces analog delay compensation elements with digital logic circuits consisting of inverters and resistors. This substitution eliminates time jitter associated with analog elements while maintaining precise phase definition through digital signal paths, achieving both manufacturing precision and jitter-free operation.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8384459B2Delay line circuit and phase interpolation module thereof

Publication Date: 2013.02.26 ELITE SEMICONDUCTOR MEMORY TECHNOLOGY INC

AI summary

A phase interpolation module comprising a first, second, and third phase interpolation units is proposed. Each of the first, second, and third phase interpolation units comprises a first through third inverters, a first and second resistors, wherein the first resistor is coupled between an output end of the first inverter and an input end of the third inverter, and the second resistor is coupled between an output end of the second inverter and the input end of the third inverter. The first and second inverters of the first phase interpolation unit receive a first signal, the first and second inverters of the third phase interpolation unit receive a second signal, and the first and second inverters of the second phase interpolation unit respectively receive the first and second signals.