Resistive Processing Unit for Hardware-Accelerated Eigenpair Computation

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Solution Overview

Problem

Existing technologies face challenges in efficiently computing eigenpairs of a matrix, particularly in hardware-based neuromorphic computing systems, where analog resistive processing units (RPUs) are used for numerical computations.

Innovation Solution

The implementation of a system that includes a processor and a resistive processing unit (RPU) with an array of cells containing tunable resistive devices. This system performs hardware-accelerated computing of eigenpairs by storing a matrix in the RPU cells and using analog matrix-vector multiplication operations to converge an initial vector to an estimate of the eigenvector.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If digital computing is used to compute eigenpairs of a matrix, then computational accuracy is maintained, but computational speed and efficiency are insufficient

Engineering Contradiction:
Improvecomputational speedVSAvoidcomputational accuracy
Core Design Contradiction:
SpeedVSReliability

Solution Approach 1:

The patent replaces digital mechanical computing systems with an analog resistive processing system. The RPU uses resistive devices to perform matrix-vector multiplication operations in the analog domain, where electrical currents and voltages naturally represent mathematical operations. This substitution enables parallel processing of all matrix elements simultaneously, achieving exponential speedup for eigenpair computations while maintaining sufficient accuracy through the physical laws governing resistive circuits.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

Solution Approach 2:

The patent employs electrical analogs (currents and voltages) flowing through resistive networks to perform computational operations. The flow of electrical current through the resistive array naturally implements matrix-vector multiplication, with Kirchhoff's laws providing the mathematical foundation. This analog electrical approach enables continuous, parallel computation at speeds unattainable by digital systems.

Inventive Principle:
Principle #29Pneumatics and hydraulics

2Loss of time

If traditional digital algorithms are used for eigenpair computation, then algorithmic precision is achieved, but computational time is excessive

Engineering Contradiction:
Improvecomputational timeVSAvoidalgorithmic precision
Core Design Contradiction:
Loss of timeVSMeasurement precision

Solution Approach 1:

The patent pre-configures the resistive processing unit with the matrix data before computation begins. The matrix elements are encoded into the conductance values of resistive devices in advance, so that when the computation is initiated, the system immediately performs parallel matrix-vector multiplication without sequential processing delays. This preliminary encoding of data into the physical structure eliminates data loading and processing overhead.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The analog resistive system performs continuous computation without the discrete sampling and processing cycles of digital systems. The electrical currents flow continuously through the resistive network, enabling real-time iterative refinement of eigenvector estimates. This continuous action allows the system to converge to precise solutions much faster than discrete digital iterations.

Inventive Principle:
Principle #20Continuity of useful action

3Productivity

If analog resistive processing is used to accelerate computation, then computational efficiency is improved, but hardware complexity increases

Engineering Contradiction:
Improvecomputational efficiencyVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The resistive processing unit is designed as a universal computational platform that can perform multiple linear algebra operations including matrix-vector multiplication, matrix transposition, and iterative eigenpair computation. The same resistive array structure handles different matrix sizes and computation types by reconfiguring input vectors and iteration parameters, eliminating the need for specialized hardware for each operation type.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent transitions from one-dimensional sequential digital processing to two-dimensional parallel analog processing using a crossbar array of resistive devices. The matrix elements are distributed across the two-dimensional resistive network, enabling simultaneous access and computation on all elements. This dimensional transformation provides exponential parallelism while maintaining a compact hardware footprint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables efficient hardware-accelerated computation of eigenpairs, leveraging the analog resistive processing capabilities to perform operations in the analog domain, thereby improving computational speed and efficiency.

Implementation Method 1

The resistive processing unit (RPU) with an array of cells which respectively comprises resistive devices, wherein a least a portion of the resistive devices are tunable to encode values of a given matrix

Methodology Applied
Scientific EffectOhm's Law: Ohm's Law

Data Source

PatentUS12306902B2Hardware acceleration for computing eigenpairs of a matrix
Publication Date: 2025.05.20 INTERNATIONAL BUSINESS MACHINE CORPORATION
  • US12306902B2 patent drawing
  • US12306902B2 patent drawing
  • US12306902B2 patent drawing

AI summary

Techniques are provided to implement hardware accelerated computing of eigenpairs of a matrix. For example, a system includes a processor, and a resistive processing unit coupled to the processor. The resistive processing unit includes an array of cells which include respective resistive devices, wherein at least a portion of the resistive devices are tunable to encode values of a given matrix which is storable in the array of cells. When the given matrix is stored in the array of cells, the processor is configured to determine an eigenvector of the stored matrix by executing a process which includes performing analog matrix-vector multiplication operations on the stored matrix to converge an initial vector to an estimate of the eigenvector of the stored matrix.