Resistive Processing Unit Floating Gate Architecture
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Solution Overview
Problem
Current hardware implementations of artificial neural networks (ANNs) lack efficiency in representing weighted connections, as they rely on software-based methods that do not effectively leverage physical properties for parallel processing and pattern recognition.
Innovation Solution
The development of resistive processing units (RPUs) based on a floating gate architecture, where a trapped insulator layer stores charges that affect the channel structure's resistance, enabling settable resistance values for weights in hardware-based ANNs, allowing for efficient feed-forward and back-propagation operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If software-based methods are used to represent weighted connections in ANNs, then implementation flexibility is maintained, but processing efficiency and parallel computation capability deteriorate
Solution Approach 1:
The patent replaces software-based weighted connection representation with a physical hardware implementation using resistive processing units. The weighted connections are represented by resistance values in cross-point devices, where the conductance between nodes physically encodes the weight values. This substitution of software with physics-based hardware enables parallel matrix multiplication operations through Ohm's law and Kirchhoff's laws, dramatically improving processing efficiency while maintaining the essential neural network functionality.
Solution Approach 2:
The patent utilizes resistance as a physical parameter to represent weighted connections in neural networks. By controlling and adjusting resistance values in the cross-point devices, the system encodes weight parameters directly in the physical state of the hardware. This parameter change from software variables to physical resistance values enables efficient analog computation, where weighted sums are computed naturally through electrical current flow, eliminating the need for sequential software processing.
2Productivity
If hardware implementations use traditional architectures, then physical properties can be leveraged for parallel processing, but efficiency in representing and updating weighted connections deteriorates
Solution Approach 1:
The resistive processing unit architecture implements a multi-functional device that simultaneously performs computation and storage functions. The cross-point devices serve dual purposes: they compute weighted sums through their conductance properties during the forward pass, and they store weight values in their physical resistance states. This universal functionality eliminates the need for separate computation and memory units, simplifying the hardware architecture and enabling efficient in-situ weight updates through physical processes like voltage pulsing.
Solution Approach 2:
The hardware architecture enables self-service weight updates through physical processes. The resistive processing units can automatically adjust their resistance states in response to applied voltage pulses during training, performing weight updates through physical mechanisms rather than requiring complex software control. The devices self-regulate their conductance states based on applied stimuli, enabling autonomous adaptation and learning without extensive external control circuitry.
3Reliability
If floating gate architecture with trapped insulator layer is used, then non-volatile storage and settable resistance values are achieved, but device fabrication complexity increases
Solution Approach 1:
The patent implements a nested structure where the trapped insulator layer is positioned between the floating gate and the channel, creating a hierarchical arrangement of functional layers. The floating gate is nested above the trapped insulator, which itself is nested above the channel region. This nested configuration allows charges to be trapped in the insulator layer, creating non-volatile resistance states that persist without power. The multi-layer structure enables reliable weight storage by physically isolating charge storage regions while maintaining electrical control through the floating gate mechanism.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables hardware-based ANNs to efficiently process data by using resistive cross-point devices with non-linear switching characteristics, improving the training and adaptation of neural networks through physical property manipulation of weights, enhancing processing efficiency and accuracy.
Implementation Method 1
a trapped insulator layer stores charges that affect the channel structure's resistance
Implementation Method 2
resistive cross-point devices with non-linear switching characteristics
Data Source
AI summary
Semiconductor devices and methods of forming the same include forming a drain/gate contact, in an opening of a layer of dielectric material, that includes a portion that extends up along sidewalls of the opening. A drain layer is formed on a bottom surface of the drain/gate contact. A trapped insulator layer is formed on sidewalls of the drain/gate contact. A channel layer is formed in the opening. A source layer is formed on the channel layer.