Resistive-State Memory Cells for Mask-Free In-Memory Computation
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Solution Overview
Problem
Existing memory devices face challenges in performing in-memory computations efficiently without requiring additional masks to change weight values, limiting their flexibility and computational speed.
Innovation Solution
A memory device comprising memory cells with transistors and resistors that can switch between different resistance states to represent different weight values, allowing product computations without additional manufacturing masks, utilizing transistors with varying resistance values based on input voltages and resistors with programmable resistance states.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If additional masks are used to change weight values in memory cells, then manufacturing precision is improved, but device complexity and manufacturing cost increase
Solution Approach 1:
The patent changes the resistance parameter of the resistor through electrical programming instead of using additional physical masks. The resistor can be programmed to different resistance states (first resistance value or second resistance value) through applied voltages, which correspond to different weight values. This parameter-based approach eliminates the need for multiple mask layers while achieving precise weight value control.
Solution Approach 2:
The patent replaces the mechanical mask-based manufacturing approach with an electrical programming approach. Instead of physically blocking patterns with masks during fabrication, the weight values are programmed electrically by setting resistors to different resistance states through applied voltages. This substitution simplifies the manufacturing process while maintaining precision.
2Productivity
If transistors operate at higher input voltages to increase computation speed, then productivity is improved, but energy consumption increases
Solution Approach 1:
The patent dynamically adjusts the operating point of the transistor based on the computation requirements. The transistor can operate at different operating points (first operating point with first input voltage, or second operating point with second input voltage higher than the first). This dynamic adjustment allows the system to optimize between speed and energy consumption by selecting appropriate operating points for different computational tasks.
Solution Approach 2:
The patent changes the input voltage parameter to control the transistor's operating point. By adjusting the input voltage between different levels, the system can achieve different computation speeds while managing energy consumption. Higher input voltages correspond to faster computation, while lower voltages reduce energy usage, allowing flexible optimization.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables flexible and efficient in-memory computations by dynamically changing weight values within the memory cells, enhancing computational speed and reducing manufacturing complexity.
Implementation Method 1
The transistor has a gate, a drain and a source, the gate receives an input voltage... when the transistor operates at a first operating point, the input voltage is equal to a first input voltage, when the transistor operates at a second operating point, the input voltage is equal to a second input voltage
Implementation Method 2
The resistor is connected to the drain and the source of the transistor, when the resistor operates in a first state, the weight value is equal to a first weight value, when the resistor operates in a second state, the weight value is equal to a second weight value
Implementation Method 3
Each of the memory cells performs a product computation of the input value and the weight value
Data Source
AI summary
A memory device for performing an in-memory computation, comprising a plurality of memory cells each stores a weight value and comprises a transistor and a resistor. A gate of the transistor receives an input voltage, the input voltage indicates an input value. When the transistor operates at a first operating point, the input voltage is equal to a first input voltage, when the transistor operates at a second operating point, the input voltage is equal to a second input voltage. The resistor is connected to a drain and a source of the transistor, when the resistor operates in a first state, the weight value is equal to a first weight value, when the resistor operates in a second state, the weight value is equal to a second weight value. Each of the memory cells performs a product computation of the input value and the weight value.


