Thin-Film Resistor Contact Capping Against Lateral Etching
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Solution Overview
Problem
The formation of thin film resistors in integrated chips is hindered by the lateral etching of conductive structures during the wet etching process, which reduces the footprint of conductive contacts, leading to misalignment issues and increased costs due to smaller landing zones for conductive vias.
Innovation Solution
A capping layer is formed over the conductive structure to prevent lateral etching, increasing the footprint of conductive contacts by covering their peripheral portions, thereby facilitating larger landing zones for vias and improving alignment and yield.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wet etching process is used to form conductive contacts, then the etching process can be performed, but lateral etching reduces the footprint of conductive contacts
Solution Approach 1:
A capping layer is formed over the conductive structure before the wet etching process to prevent lateral etching. This preliminary protective action ensures that the conductive contacts maintain their intended footprint size while still allowing the etching process to proceed for forming the contacts.
Solution Approach 2:
The capping layer acts as an intermediary protective layer between the wet etching process and the conductive structure. It selectively protects the conductive contacts from lateral etching while allowing the etching process to function for contact formation, thus resolving the contradiction between performing etching and maintaining contact footprint.
2Productivity
If conductive contacts have smaller footprint due to lateral etching, then etching can proceed, but misalignment issues and costs increase
Solution Approach 1:
The capping layer is applied in advance to protect the conductive contacts, ensuring they maintain adequate footprint size before via formation. This preliminary protection prevents the misalignment issues that would otherwise arise from reduced contact footprints, thereby maintaining both productivity and precision.
Solution Approach 2:
The capping layer provides beforehand cushioning or protection to the conductive contacts, compensating for potential lateral etching effects. This ensures that even if etching occurs, the contact footprint remains sufficient for proper via alignment, thus cushioning against misalignment issues and maintaining manufacturing precision.
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an integrated chip (IC). The IC comprises a substrate. A resistor overlies the substrate. The resistor comprises a resistive structure overlying the substrate. The resistor also comprises a conductive contact overlying and electrically coupled to the resistive structure. A capping structure is disposed over the conductive contact, wherein the capping structure extends laterally over an upper surface of the conductive contact and vertically along a first sidewall of the conductive contact, such that a lower surface of the capping structure is disposed below a lower surface of the conductive contact.