Semiconductor Resistor Extraction with Adjacent Circuit Compensation
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Conventional LVS processes struggle to accurately estimate the resistance (R) value of resistors in semiconductor circuits due to the shrinking size of semiconductor units, where R is affected by nearby semiconductor units beyond just width and length, leading to imprecision in consistency checks between physical and logical designs.
Innovation Solution
A computer-implemented method that imports a semiconductor circuit layout, defines a device region, extracts parameters, and uses a compensation value (Rc) from a lookup table based on layer density and distance to refine the R value, adjusting it to improve accuracy.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If conventional LVS process is used to estimate resistor R value based only on width and length, then the estimation process is simple, but the estimation precision deteriorates due to ignoring adjacent circuit effects
Solution Approach 1:
The patent segments the resistor analysis into two parts: the basic geometric parameters (width and length) and the environmental parameters (adjacent circuit effects). By extracting and separately analyzing these segments, the method achieves more precise R value estimation while managing complexity through systematic categorization of extraction parameters.
Solution Approach 2:
The patent performs preliminary extraction of environmental parameters (layer density, layer distance, adjacent device types) before calculating the final R value. This preliminary action allows the system to pre-process and store compensation data, which is then applied to refine the R value estimation, thereby improving precision without significantly increasing overall process complexity.
2Manufacturing precision
If shrinking semiconductor unit sizes are used to advance technology, then the manufacturing capability is improved, but the LVS accuracy deteriorates because adjacent circuit effects become more significant
Solution Approach 1:
The patent changes the parameters used for R value estimation from only geometric parameters (width, length) to include environmental parameters (layer density, layer distance, adjacent device types). This parameter change allows the LVS process to account for adjacent circuit effects that become more significant as semiconductor units shrink, thereby maintaining LVS accuracy despite smaller feature sizes.
Solution Approach 2:
The patent introduces environmental parameters as intermediary factors that mediate between the physical layout and the electrical characteristics. These intermediary parameters (extracted from the layout environment) capture the influence of adjacent circuits and are used to adjust the R value estimation, bridging the gap between geometric dimensions and actual electrical behavior in scaled-down devices.
Data Source
AI summary
A computer implemented method for performing extraction is provided in the present invention. First, a layout of a semiconductor circuit having a resistor is imported by using a computer wherein a device region is defined in the layout and the resistor is located within the device region. Next, the device region of the layout are extracted, and a compensation value of Rs (Rc) is obtained according to the extracting step. An adjustment process is performed according to Rc to obtained a refined R value.