Resistor-String DAC Architecture With Single Buffer for Higher Resolution

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Solution Overview

Problem

State-of-the-art digital to analogue voltage converters, particularly those using coarse-fine resistive architectures, face challenges with area and power consumption due to the need for multiple voltage buffers and switch trees, leading to non-monotonicity and increased complexity, especially in high-resolution implementations.

Innovation Solution

A digital to analogue voltage converter design that utilizes a single coarse switch tree and a single voltage buffer, along with a pair of transconductors to provide a proportional current to both resistor strings, reducing active area, power consumption, and eliminating buffer-induced non-monotonicity, while allowing for accurate control of voltage steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple voltage buffers and coarse switch trees are used in coarse-fine architecture, then the DAC can achieve high resolution, but the silicon area and power consumption increase significantly

Engineering Contradiction:
ImproveDAC resolutionVSAvoidsilicon area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges multiple coarse switch trees into a single shared coarse switch tree that serves multiple fine resistor strings. This consolidation reduces the number of switches and buffers required, directly decreasing silicon area while maintaining the ability to achieve high resolution through the shared architecture.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The single voltage buffer is designed to serve multiple functions by buffering outputs from the shared coarse switch tree for multiple fine resistor strings. This multi-functional buffer replaces what would traditionally require separate buffers for each fine string, reducing overall component count and area.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If multiple voltage buffers are used in coarse-fine architecture, then the DAC can provide isolated coarse strings, but offset and noise are introduced along with added complexity

Engineering Contradiction:
Improvecoarse string isolationVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines multiple buffer functions into a single voltage buffer that serves the entire coarse-fine architecture. This single buffer provides the necessary isolation and buffering for multiple fine resistor strings, reducing circuit complexity while maintaining reliable coarse string isolation through its universal buffering capability.

Inventive Principle:
Principle #5Merging (Combining)

3Measurement precision

If switch trees are used for coarse voltage selection, then the DAC can achieve precise voltage selection, but the switch area dominates the total area for high resolution strings

Engineering Contradiction:
Improvevoltage selection precisionVSAvoidswitch area
Core Design Contradiction:
Measurement precisionVSArea of stationary object

Solution Approach 1:

The patent merges multiple coarse switch trees into a single shared switch tree that provides voltage selection for multiple fine resistor strings. This consolidation maintains precise voltage selection capability while dramatically reducing the total switch area required, as the switches are shared across multiple functional paths.

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS20240195431A1Digital to analogue voltage converter
Publication Date: 2024.06.13 AMS INTERNATIONAL AG
  • US20240195431A1 patent drawing
  • US20240195431A1 patent drawing
  • US20240195431A1 patent drawing

AI summary

A digital to analogue voltage converter (DAC) comprising: a first resistor string having a plurality of resistors; and a plurality of DAC stages, each DAC stage coupled to said first resistor string and comprising: a voltage buffer; a first switching stage coupled to the first resistor string, the first switching stage configured to provide an input to the voltage buffer in dependence on receiving a first sub-word of a digital input; a second resistor string having one or more resistors, wherein a first end of the second resistor string is coupled to a current source and a second end of the second resistor string is coupled to an output of the voltage buffer; and a second switching stage coupled to the second resistor string and configured to provide an output of the DAC stage in dependence on receiving a second sub-word of the digital input.