Resolution Circuitry for Memory Queue Stall Prevention

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Solution Overview

Problem

Data processing systems experience stalls due to full queues in memory access requests, which reduce system speed and efficiency, as existing technologies struggle to manage queue capacity effectively.

Innovation Solution

Incorporating resolution circuitry with a capacity limit that examines and issues further requests from the queue when full, allowing data to be prefetched into cache levels, thereby reducing latency and maintaining system performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Device complexity

If queue capacity is limited to keep circuit sizes and power consumption low, then device complexity and energy use are reduced, but system speed deteriorates due to stalls when queues are full

Engineering Contradiction:
Improvecircuit sizeVSAvoidsystem operating speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

The resolution circuitry performs preliminary actions by examining the next request in the queue and issuing further requests in advance, even when the queue is full. This prefetching mechanism ensures data is ready before it is needed, preventing stalls and maintaining system speed without increasing queue capacity.

Inventive Principle:
Principle #10Preliminary action

2Speed

If queue capacity is increased to prevent stalls, then system speed is improved, but device complexity and power consumption increase

Engineering Contradiction:
Improvesystem operating speedVSAvoidcircuit size
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

Instead of increasing queue capacity, the system performs preliminary actions by issuing further requests in advance through the resolution circuitry. This maintains system speed without requiring larger queues, thus avoiding increased device complexity and power consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The resolution circuitry acts as an intermediary between the queue circuitry and the memory system. It examines pending requests and issues further requests proactively, mediating the flow of data to prevent stalls without expanding the queue infrastructure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Use of energy by stationary object

If queue capacity is limited, then power consumption is reduced, but system efficiency deteriorates due to stalls

Engineering Contradiction:
Improvepower consumptionVSAvoidsystem efficiency
Core Design Contradiction:
Use of energy by stationary objectVSProductivity

Solution Approach 1:

The resolution circuitry issues further requests in advance before the queue becomes full, performing preliminary data preparation. This prevents stalls that would reduce system efficiency while keeping the queue capacity limited and power consumption low.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system serves itself by having the resolution circuitry automatically examine and issue further requests based on the current queue state. This self-regulating mechanism maintains efficiency without requiring additional resources or increasing power consumption.

Inventive Principle:
Principle #25Self-service

4Quantity of substance

If the system stalls to wait for queue space, then queue capacity can be kept small, but loss of time increases due to waiting

Engineering Contradiction:
Improvequeue capacityVSAvoidwaiting time
Core Design Contradiction:
Quantity of substanceVSLoss of time

Solution Approach 1:

The resolution circuitry performs preliminary actions by issuing further requests in advance, so data is prepared before it is needed. This eliminates waiting time while keeping queue capacity small, as the system proactively manages data flow rather than passively waiting for queue space.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10229066B2Queuing memory access requests
Publication Date: 2019.03.12 ARM LTD
  • US10229066B2 patent drawing
  • US10229066B2 patent drawing
  • US10229066B2 patent drawing

AI summary

A data processing apparatus is provided including queue circuitry to respond to control signals each associated with a memory access instruction, and to queue a plurality of requests for data, each associated with a reference to a storage location. Resolution circuitry acquires a request for data, and issues the request for data, the resolution circuitry having a resolution circuitry limit. When a current capacity of the resolution circuitry is below the resolution circuitry limit, the resolution circuitry acquires the request for data by receiving the request for data from the queue circuitry, stores the request for data in association with the storage location, issues the request for data, and causes a result of issuing the request for data to be provided to said storage location. When the current capacity of the resolution circuitry meets or exceeds the resolution circuitry limit, the resolution circuitry acquires the request for data by examining a next request for data in the queue circuitry and issues a further request for the data based on the request for data.