Resonant Frequency Divider for Low-Power Signal Generation
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Solution Overview
Problem
Existing frequency divider circuits in RF communications have high power consumption and significant electromagnetic interferences due to the use of high-frequency oscillators and logic-based clock divider circuits, which require stringent rise-time and fall-time characteristics and multiple logic level drivers.
Innovation Solution
A signal generator with a divider circuit and an adjuster that adjusts the resonant frequency to reduce power consumption and minimize electromagnetic interferences, allowing the divider circuit to operate directly with a low-amplitude sinusoidal signal from an oscillator, eliminating the need for logic level drivers and reducing the minimum amplitude required for frequency division.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If logic-based clock divider circuits are used, then frequency division can be performed, but power consumption increases and electromagnetic interferences occur
Solution Approach 1:
The patent replaces logic-based digital clock divider circuits with a resonant circuit-based frequency divider. Instead of using digital logic gates and flip-flops that consume significant power, the invention uses a resonant circuit with adjustable resonant frequency that can directly divide the reference frequency without requiring high-power logic level drivers, thereby reducing power consumption while maintaining frequency division functionality
Solution Approach 2:
The patent employs an adjuster to dynamically change the resonant frequency parameter of the resonant circuit to match the source frequency. By adjusting the resonant frequency parameter of the circuit, the system can adapt to different frequency division ratios without requiring high-power logic circuits, thus reducing power consumption while maintaining effective frequency division
2Productivity
If logic-based clock divider circuits are used, then frequency division can be performed, but electromagnetic interferences increase
Solution Approach 1:
The patent replaces logic-based digital clock divider circuits with a resonant circuit-based frequency divider. Instead of using digital logic gates and flip-flops that consume significant power, the invention uses a resonant circuit with adjustable resonant frequency that can directly divide the reference frequency without requiring high-power logic level drivers, thereby reducing power consumption while maintaining frequency division functionality
Solution Approach 2:
The resonant circuit acts as an intermediary between the low-amplitude sinusoidal reference signal and the frequency division function. By using the resonant circuit's natural resonance properties at a specific frequency, the system can perform frequency division without requiring high-power logic level drivers, thereby reducing electromagnetic interferences while maintaining frequency division capability
3Adaptability or versatility
If high frequency VCO or DCO is used, then local oscillator signals can be generated, but power consumption increases
Solution Approach 1:
The patent segments the frequency generation process into two stages: first, a low-power oscillator generates a reference signal at a frequency higher than the carrier frequency; second, a resonant circuit-based frequency divider divides this reference frequency to generate the required local oscillator signals at carrier frequencies. This segmentation allows the use of a lower-frequency, lower-power oscillator while still achieving the required high-frequency local oscillator signals through frequency division
Solution Approach 2:
The patent uses an adjustable resonant frequency in the divider circuit that can be dynamically tuned to match the source frequency. This dynamic adjustment capability allows the system to adapt to different frequency division ratios and generate multiple local oscillator frequencies from a single reference signal, maintaining versatility while reducing power consumption compared to using multiple high-frequency oscillators
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution reduces power consumption and electromagnetic interferences, improving radio performance by allowing the signal generator to operate efficiently with lower amplitude signals and minimizing phase mismatches, thus enhancing the symmetry of local oscillator signals.
Implementation Method 1
the divider circuit being adapted to divide the reference frequency of the reference signal by a coefficient, such that the source signal has a source frequency that is less than the reference frequency
Implementation Method 2
an adjuster adapted to adjust the resonant frequency; wherein the divider circuit has an input to receive the reference signal and an output for providing the source signal
Data Source
AI summary
A low power signal generator and a method for generating at least one source signal based on a reference signal having a reference frequency is presented. The signal generator has a divider circuit having a resonant frequency. The generator has an adjuster adapted to adjust the resonant frequency. The divider circuit has an input to receive the reference signal and an output for providing the source signal. The divider circuit is adapted to divide the reference frequency of the reference signal by a coefficient, such that the source signal has a source frequency that is less than the reference frequency.