Resonator Layout With Offset Capacitor Stack for Lower Parasitics
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Solution Overview
Problem
Existing bulk acoustic wave filters require high-performance resonators with improved stability and performance, particularly in integrating capacitors within the resonator structure to enhance filtering characteristics.
Innovation Solution
A resonator design with a capacitor stacking layer outside the overlapping region, integrated on-chip capacitors, and a passivation layer that does not overlap with the capacitor, allowing independent material thickness selection and flexible capacitor value adjustment.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If capacitors are integrated within the resonator structure, then filtering performance is enhanced, but parasitic effects increase and capacitor value adjustment becomes difficult
Solution Approach 1:
The capacitor stacking layer is positioned outside the first overlapping region in the planar dimension, separating it from the piezoelectric resonance area. This spatial separation in two dimensions reduces parasitic coupling between the capacitor and piezoelectric elements while maintaining electrical connection through conductive structures, thereby enhancing filtering performance with reduced parasitic effects.
Solution Approach 2:
The resonator structure is segmented into distinct functional regions: the first overlapping region contains the piezoelectric resonator elements, while the capacitor stacking layer is separated in the second overlapping region. This segmentation allows independent optimization of the resonator and capacitor functions, reducing mutual interference and parasitic effects.
2Reliability
If the passivation layer overlaps with the capacitor stacking layer, then device protection is improved, but material thickness selection becomes constrained and capacitor value adjustment flexibility is reduced
Solution Approach 1:
The passivation layer is positioned in a third overlapping region that is offset from both the first overlapping region (piezoelectric resonator) and the second overlapping region (capacitor stacking layer). This three-dimensional spatial arrangement allows the passivation layer to provide device protection without constraining the material thickness selection for the capacitor, thereby maintaining capacitor value adjustment flexibility while ensuring device protection.
3Reliability
If high quality factor resonators are used, then insertion loss is reduced and roll-off characteristics are steeper, but manufacturing complexity and stability requirements increase
Solution Approach 1:
The capacitor stacking layer is integrated into the resonator structure through conductive connections, merging the capacitor function with the resonator. This integration eliminates the need for separate discrete capacitors, reducing overall device complexity while achieving high quality factor performance through the unified structure. The merged design simplifies manufacturing by reducing the number of separate components and assembly steps.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enhances filtering performance by reducing parasitic effects and enabling precise capacitor value adjustment, thus improving the quality factor and roll-off characteristics of the resonator.
Implementation Method 1
a first electrode layer, a first piezoelectric layer, and a second electrode layer which are sequentially stacked onto the substrate. The first electrode layer, the first piezoelectric layer, and the second electrode layer form a first overlapping region along the stacking direction
Implementation Method 2
The capacitor stacking layer comprises a lower electrode, a dielectric layer, and an upper electrode which are sequentially stacked onto the first piezoelectric layer
Data Source
AI summary
The present disclosure provides a resonator and a preparation method therefor, relating to the technical field of resonators. The resonator comprises a substrate, and a first electrode layer, a first piezoelectric layer, and a second electrode layer which are sequentially stacked onto the substrate. The first electrode layer, the first piezoelectric layer, and the second electrode layer form a first overlapping region along the stacking direction. A capacitor stacking layer is arranged on the first piezoelectric layer and located outside the first overlapping region. A passivation layer is arranged above the second electrode layer, and the passivation layer extends above the capacitor stacking layer.


