Resonator IC Pad Layout for Low-Stress Flip-Chip Mounting

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Solution Overview

Problem

Existing semiconductor integrated circuits face challenges in reducing size due to the inefficiency of using wiring layers as dummy patterns, which increases the overall size of the circuit and risks damage to active elements during wire bonding.

Innovation Solution

A resonator device design featuring a resonator, an integrated circuit that oscillates and generates an oscillation signal, and a container with metal bumps for electrical coupling, where the integrated circuit includes pads overlapping the metal bumps with a width ratio of W1/W2 ≥ 1.08 to minimize stress and prevent damage, allowing for a more compact design without the need for dummy patterns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a wiring layer is used as a dummy pattern between the coupling pad and active element, then damage to the active element during wire bonding is prevented, but the wiring layer cannot be effectively used and the size of the semiconductor integrated circuit increases

Engineering Contradiction:
Improveprotection of active element during wire bondingVSAvoidsize of semiconductor integrated circuit
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention merges the dummy pattern function with the wiring layer by forming the dummy pattern using the same wiring layer material and process. The dummy pattern is created by selectively removing insulating films and forming conductive patterns in the wiring layer, allowing it to serve both as electrical wiring and as stress-absorbing dummy structure during wire bonding, thereby preventing active element damage without increasing circuit size

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The wiring layer is given multiple functions: it serves as both the electrical connection wiring and as the dummy pattern for stress absorption during wire bonding. By making the wiring layer multi-functional, the invention eliminates the need for separate dummy structures, thus preventing active element damage while maintaining compact circuit size

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Reliability

If the pad width W1 is increased relative to metal bump width W2 to reduce stress on the integrated circuit during mounting, then damage prevention is improved, but the device size increases

Engineering Contradiction:
Improveprevention of damage to integrated circuit during mountingVSAvoiddevice size
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The invention optimizes the width ratio parameter W1/W2 to be 1.05 or more, which is the critical threshold for effective stress distribution. By setting this specific parameter value, the pad can effectively distribute mounting stress to protect the integrated circuit while minimizing the increase in device size. This parameter optimization achieves the best balance between damage prevention and compact size

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20240014798A1Resonator device
Publication Date: 2024.01.11 SEIKO EPSON CORP
  • US20240014798A1 patent drawing
  • US20240014798A1 patent drawing
  • US20240014798A1 patent drawing

AI summary

A resonator device includes: a resonator; an integrated circuit device configured to oscillate the resonator and to generate an oscillation signal; a container accommodating the resonator and the integrated circuit device; and a metal bump bonded to the integrated circuit device and electrically coupling the integrated circuit device and the container. The integrated circuit device includes a pad bonded to the metal bump, and a circuit disposed at a position overlapping the metal bump in a plan view of the pad, and W1/W2≥1.08, where W1 represents a width of the pad, and W2 represents a width of the metal bump.