Semiconductor RESURF Layer Design for Breakdown Voltage

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Solution Overview

Problem

In semiconductor devices with RESURF structures, increasing the number of implantation levels to relieve electric field concentration leads to a higher number of photolithography and impurity implantation processes, which is costly and inefficient, especially when using thick-film resist masks or semiconductor materials like SiC with limited thermal diffusion.

Innovation Solution

A semiconductor device design featuring multiple electric field relief layers with alternating small and large regions, allowing for increased effective implantation levels without a proportional increase in photolithography and impurity implantation processes, thereby reducing costs and improving reliability.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the number of implantation levels is increased to relieve electric field concentration, then breakdown voltage performance is improved, but the number of photolithography and impurity implantation processes increases

Engineering Contradiction:
Improvebreakdown voltage performanceVSAvoidnumber of photolithography and impurity implantation processes
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The termination region is divided into multiple electric field relief layers with different impurity concentrations, where each layer has a specific function in relieving electric field concentration. This segmentation allows the achievement of high breakdown voltage through multiple concentration levels while using a reduced number of photolithography processes by forming multiple layers in sequence rather than requiring separate processes for each concentration level.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the termination structure are assigned different impurity concentrations tailored to their specific functional requirements. The first electric field relief layer has a first impurity concentration, the second layer has a second impurity concentration, and the third layer has a third impurity concentration, with each concentration optimized for its local electric field management needs, thereby achieving overall breakdown voltage improvement without uniform high-complexity processing.

Inventive Principle:
Principle #3Local quality

2Reliability

If multiple electric field relief layers with different impurity concentrations are formed, then electric field concentration is relieved, but manufacturing cost increases

Engineering Contradiction:
Improveelectric field concentration reliefVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

Impurity ions are pre-formed in the semiconductor substrate before the final photolithography and implantation processes. This preliminary formation of impurity ions allows subsequent photolithography processes to simply define and pattern the regions where implantation will occur, rather than requiring separate processes to introduce impurities at each concentration level, thereby reducing manufacturing cost while maintaining multiple electric field relief layers.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Multiple impurity implantation steps that would traditionally be required to create different concentration layers are merged into a single implantation process that utilizes pre-formed impurity ions. The photolithography process then selectively activates these pre-formed ions in different regions, combining the functions of multiple implantation steps into one process sequence, thereby reducing manufacturing cost.

Inventive Principle:
Principle #5Merging (Combining)

3Manufacturing precision

If thick-film resist masks are used for multiple implantation levels, then precise implantation is achieved, but the number of photolithography processes increases

Engineering Contradiction:
Improveimplantation precisionVSAvoidnumber of photolithography processes
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

Impurity ions are pre-formed and distributed throughout the semiconductor substrate before the photolithography process. This preliminary action eliminates the need for multiple photolithography processes to introduce impurities at different levels, as the impurity ions are already in place and only need to be activated or patterned in specific regions, thereby maintaining precision while reducing process complexity.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The same photolithography mask pattern can be reused or adapted across different implantation levels by utilizing the pre-formed impurity ion distribution. Instead of creating entirely new mask patterns for each concentration level, the process copies or modifies the basic mask design to work with the pre-existing impurity distribution, thereby reducing the number of unique photolithography processes required while maintaining precise implantation.

Inventive Principle:
Principle #26Copying

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This design achieves high breakdown voltage performance and reliability with reduced process complexity and cost, while effectively managing electric field concentration in semiconductor devices.

Implementation Method 1

a first impurity region and a second impurity region are formed in a semiconductor substrate by an ion implantation

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Implementation Method 2

a depletion layer spreading in the semiconductor maintains the breakdown voltage performance

Methodology Applied
Scientific EffectDepletion layer spreading: Electric Field

Data Source

PatentUS8716717B2Semiconductor device and method for manufacturing the same
Publication Date: 2014.05.06 MITSUBISHI ELECTRIC CORP
  • US8716717B2 patent drawing
  • US8716717B2 patent drawing
  • US8716717B2 patent drawing

AI summary

A RESURF layer including a plurality of P-type implantation layers having a low concentration of P-type impurity is formed adjacent to an active region. The RESURF layer includes a first RESURF layer, a second RESURF layer, a third RESURF layer, a fourth RESURF layer, and a fifth RESURF layer that are arranged sequentially from the P-type base side so as to surround the P-type base. The second RESURF layer is configured with small regions having an implantation amount equal to that of the first RESURF layer and small regions having an implantation amount equal to that of the third RESURF layer being alternately arranged in multiple. The fourth RESURF layer is configured with small regions having an implantation amount equal to that of the third RESURF layer and small regions having an implantation amount equal to that of the fifth RESURF layer being alternately arranged in multiple.