RESURF Semiconductor Structure With Insulating Pillar Alignment
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The fabrication of traditional super junction structures in semiconductor devices is complex, time-consuming, and costly, leading to issues like epitaxial defects and misalignment of overlay patterns, which increases manufacturing costs and reduces the efficiency of semiconductor devices.
Innovation Solution
A semiconductor device with a reduced surface electric field (RESURF) structure is formed using a simplified method involving epitaxial layers, doping regions, and insulating pillars, where accurate alignment is achieved through a trench formation and ion implantation process, reducing the need for multiple epitaxial and photolithography processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If traditional super junction structure fabrication is used, then doping regions can be formed, but the process becomes complicated and time-consuming with multiple epitaxial and photolithography steps
Solution Approach 1:
The method performs preliminary actions by forming both the first and second doping regions in a single ion implantation step before trench formation, rather than requiring separate epitaxial growth steps for each doping region. This preliminary doping approach eliminates the need for multiple photolithography and epitaxial processes, significantly simplifying the fabrication process while maintaining precise alignment of doping regions.
2Manufacturing precision
If multiple epitaxial processes are performed, then doping regions can be formed with different concentrations, but manufacturing cost increases and epitaxial defects are formed
Solution Approach 1:
The invention achieves different doping concentrations by changing the ion implantation parameters (energy, dose, angle) rather than performing multiple epitaxial growth processes. The first and second doping regions are formed with different concentrations through a single ion implantation step with optimized parameters, eliminating the accumulation of epitaxial defects that would result from multiple growth cycles while maintaining precise concentration control.
3Manufacturing precision
If multiple photolithography and ion-implantation processes are used, then complex doping patterns can be formed, but misalignment of overlay patterns occurs
Solution Approach 1:
The method merges multiple separate ion implantation and photolithography steps into a single integrated process. Both the first and second doping regions are formed simultaneously in one ion implantation step using a single mask pattern, eliminating the cumulative alignment errors that would occur with multiple sequential photolithography steps and significantly reducing total fabrication time.
4Strength
If trench gate structure with vertical current flow is used, then withstand voltage is increased, but manufacturing complexity increases
Solution Approach 1:
The method performs preliminary doping of both the first and second doping regions before trench formation and gate structure fabrication. This preliminary action simplifies the overall manufacturing process by eliminating subsequent complex alignment steps between the doping regions and the trench gate structure, while still achieving the high withstand voltage performance through the vertical current flow path enabled by the trench gate configuration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases the breakdown voltage and reduces the on-resistance of semiconductor devices while maintaining a simple manufacturing process, avoiding costly epitaxial defects and misalignment issues, thus improving the electrical performance and operational stability of the devices.
Implementation Method 1
an epitaxial layer, a well region, an insulating pillar, at least one first doping region, at least one second doping region
Implementation Method 2
performing a first ion implantation process over the mask to form at least one first doping region in the epitaxial layer through the hole of the mask
Data Source
AI summary
A semiconductor device includes a substrate, an epitaxial layer on the substrate, a well region in the epitaxial layer, an insulating pillar extending into the epitaxial layer, a first doping region in the epitaxial layer and surrounding the insulating pillar, a second doping region under the first doping region, and a gate structure formed at one lateral side of the insulating pillar and extending into the epitaxial layer. The substrate and the epitaxial layer each have a first conductivity type. The well region and the first and second doping regions each have a second conductivity type. The gate structure is separated from the insulating pillar. The insulating pillar penetrates the first doping region by extending from the top portion to the bottom portion of the first doping region. The first doping region is electrically connected to the well region.