RESURF Transistor With Trench Capacitor Four-Sided Depletion
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Solution Overview
Problem
High voltage transistors face a challenge in achieving both low on-state resistance and high blocking voltage, with existing technologies limited by two-sided depletion regions in the off-state, which restricts further doping and increases on-state resistance.
Innovation Solution
A semiconductor device with a drift region featuring four-sided depletion using trench capacitors and a stack of conductivity regions, allowing MOS capacitor depletion in addition to PN junction depletion, thereby increasing doping in the drift region and reducing on-state resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If two-sided depletion regions are used in the drift region, then blocking voltage is maintained, but on-state resistance increases
Solution Approach 1:
The patent transitions from two-sided depletion regions to four-sided depletion regions by adding lateral depletion at the trench capacitor interfaces. This dimensional expansion of the depletion structure allows simultaneous achievement of high blocking voltage and low on-state resistance by utilizing the fourth side (lateral direction) for additional depletion without compromising the vertical blocking capability.
Solution Approach 2:
The patent embeds trench capacitors within the drift region, nesting the MOS capacitor structure inside the existing PN junction framework. The trench capacitors with their dielectric and conductive layers are positioned within the drift region, creating nested depletion regions where the MOS capacitor depletion works in conjunction with the PN junction depletion to achieve four-sided depletion.
2Object-affected harmful factors
If doping in the drift region is increased to reduce on-state resistance, then on-state resistance decreases, but blocking voltage decreases
Solution Approach 1:
The patent introduces MOS capacitor depletion as an intermediary mechanism that supplements PN junction depletion. The trench capacitors create an additional depletion field that acts as a mediator, allowing the drift region to maintain higher doping levels for lower on-state resistance while the MOS capacitor depletion compensates to preserve the blocking voltage capability.
Solution Approach 2:
The patent creates a composite depletion structure combining PN junction depletion and MOS capacitor depletion. By integrating two different depletion mechanisms (junction-based and capacitor-based) into a unified four-sided depletion system, the device achieves enhanced performance where the composite structure provides both low on-state resistance and high blocking voltage simultaneously.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach significantly reduces on-state resistance by up to a factor of two while maintaining high blocking voltage, improving transistor performance by utilizing four-sided depletion in the blocking mode.
Implementation Method 1
MOS capacitor depletion in addition to PN junction depletion
Implementation Method 2
PN junction depletion in the blocking mode
Data Source
AI summary
A high voltage semiconductor device, such as a RESURF transistor, having improved properties, including reduced on state resistance. The device includes a semiconductor substrate with a drift region between source region and drain regions. The drift region includes a structure having a spaced trench capacitor extending between the source region and the drain region and a vertical stack extending between the source region and the drain region. When the device is in an on state, current flows between the source and drain regions; and, when the device is in an off/blocking state, the drift region is depleted into the stack.