Nearly-Real-Time Clock Recovery for RET Oscilloscopes with Closed Eye Diagrams
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Solution Overview
Problem
Conventional real-time oscilloscopes are costly due to numerous hardware components, while equivalent-time oscilloscopes have slower acquisition rates and signal fidelity issues, and Real-Equivalent-Time (RET) oscilloscopes struggle with clock recovery when signal eye diagrams are nearly or completely closed.
Innovation Solution
Implementing a nearly-RT RET clock recovery technique that uses software-based clock recovery and anti-aliasing filters to handle signals with impairments, allowing RET oscilloscopes to operate at higher sample rates and recover clocks accurately even with closed eye diagrams.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If conventional real-time oscilloscopes use more hardware components to achieve high acquisition rate, then the acquisition rate is improved, but the cost increases
Solution Approach 1:
The patent replaces hardware-based clock recovery mechanisms with software-based clock recovery algorithms. Specifically, it uses digital signal processing techniques including correlation-based clock recovery and decision-directed clock recovery algorithms to achieve high acquisition rates without proportionally increasing hardware complexity. The software implementation allows flexible adaptation to different signal conditions while maintaining cost-effectiveness.
Solution Approach 2:
The patent changes the operating parameters of the RET oscilloscope by adjusting the sample rate to be nearly equal to the symbol rate (e.g., sampling at 0.95 symbols/sample). This parameter optimization, combined with software-based clock recovery, enables the system to achieve high acquisition rates comparable to real-time oscilloscopes while using fewer hardware resources.
2Device complexity
If RET oscilloscopes use software-based clock recovery, then the cost is reduced, but the clock recovery fails when eye diagram is closed
Solution Approach 1:
The patent implements dynamic clock recovery algorithms that adapt to changing signal conditions. The system switches between different clock recovery methods (correlation-based and decision-directed) depending on the eye diagram opening and signal quality. This dynamic adaptation ensures reliable clock recovery even when the eye diagram is closed or partially closed, maintaining reliability while using software-based approaches.
Solution Approach 2:
The patent employs feedback mechanisms in the clock recovery process where the recovered clock is continuously monitored and adjusted based on signal quality metrics such as eye diagram opening. The decision-directed clock recovery uses feedback from detected data symbols to refine clock timing, enabling accurate recovery even in challenging signal conditions with closed eye diagrams.
3Speed
If the sample rate is increased to support real-time oscilloscope channel, then the acquisition rate is improved, but aliasing occurs in RET oscilloscope
Solution Approach 1:
The patent applies preliminary anti-aliasing measures by using software-based clock recovery and signal processing techniques before final waveform reconstruction. The system recovers the clock signal from the aliased samples using correlation-based methods, then uses this recovered clock to properly resample and reconstruct the original signal, effectively eliminating aliasing artifacts in the final output.
Solution Approach 2:
The patent discards the aliased samples in the traditional sense but recovers the original signal information through software-based clock recovery. By extracting timing information from the aliased samples using correlation algorithms and decision-directed methods, the system reconstructs the original high-speed signal waveform without aliasing, effectively recovering the lost information.
Data Source
AI summary
A test and measurement device has an input port to receive a signal from a device under test (DUT), the signal having a symbol rate, one or more analog-to-digital converters (ADC) to convert the signal to waveform samples at a sampling rate, and one or more processors, when aliasing is present: up-sample a portion of the signal having aliased samples to produce up-sampled samples; use the up-sampled samples to produce a real-time waveform; perform clock recovery on the real-time waveform to produce a recovered clock; and resample the aliased samples to produce a non-aliased waveform.