Crystal Oscillator Startup Using Retained PLL Chirp Tuning

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Solution Overview

Problem

Crystal oscillators face a design trade-off between power efficiency and startup time, with higher startup resistance consuming more power but increasing the time to reach steady state, and existing solutions often require high energy injection over a large frequency range, which is inefficient and impractical.

Innovation Solution

Implementing a phase-locked loop (PLL) in chirp mode, where a retained coarse code and sweep voltage generate a chirp signal to quickly stimulate the crystal oscillator, reducing the startup time while minimizing power consumption by targeting the resonant frequency with a smaller energy injection range.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If higher startup resistance is used to stimulate the crystal oscillator, then the startup time is reduced, but the power consumption increases

Engineering Contradiction:
Improvestartup timeVSAvoidpower consumption
Core Design Contradiction:
SpeedVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary action by storing a retained coarse code during prior operation that represents the optimal tuning point for the VCO. Upon wakeup, this pre-stored code is immediately applied to the VCO, eliminating the need for time-consuming frequency searching and reducing startup time while minimizing energy consumption.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The invention changes the parameter of VCO frequency tuning by applying a retained coarse code that was previously determined to be optimal. This parameter change allows the system to jump directly to the correct frequency range, reducing both startup time and power consumption compared to traditional sweeping methods.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If energy is injected over a large frequency range to ensure crystal oscillator startup, then the reliability of startup is improved, but the energy consumption increases

Engineering Contradiction:
Improvestartup reliabilityVSAvoidenergy consumption
Core Design Contradiction:
ReliabilityVSUse of energy by moving object

Solution Approach 1:

The system performs preliminary frequency characterization during normal operation to determine and store the retained coarse code. This preliminary action ensures that upon wakeup, the system can reliably start the crystal oscillator by applying the pre-determined optimal frequency code, eliminating the need for broad frequency sweeping and reducing energy consumption while maintaining high startup reliability.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses its own operational data from previous periods to service its startup needs. The retained coarse code is self-generated from prior VCO operation and is used to automatically tune the VCO upon wakeup, creating a self-service mechanism that improves reliability without requiring external energy-intensive frequency searching.

Inventive Principle:
Principle #25Self-service

3Use of energy by moving object

If the crystal oscillator is disabled to conserve power during sleep mode, then the power efficiency is improved, but the startup time from sleep mode increases

Engineering Contradiction:
Improvepower efficiencyVSAvoidwakeup time
Core Design Contradiction:
Use of energy by moving objectVSLoss of time

Solution Approach 1:

Before entering sleep mode, the system performs preliminary action by determining and storing the retained coarse code that represents the optimal VCO tuning point. This pre-stored information is maintained across sleep mode, allowing the system to quickly restart the crystal oscillator upon wakeup by immediately applying the retained code, thus reducing wakeup time while maintaining power efficiency during sleep.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system maintains continuity of useful action by preserving the retained coarse code across sleep mode transitions. This continuous retention of tuning information allows seamless transition from power-saving sleep mode to active operation, minimizing the time loss during wakeup while maintaining high power efficiency when disabled.

Inventive Principle:
Principle #20Continuity of useful action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enables a faster and more power-efficient startup of crystal oscillators by using a PLL in chirp mode to stimulate the crystal oscillator, reducing the transient time and energy usage, making it suitable for power-constrained applications.

Implementation Method 1

configuring a control voltage input of a voltage-controlled oscillator (VCO) of the PLL to be regulated by a sweep voltage; with the PLL in the chirp mode: obtaining a retained coarse code for the VCO... applying the retained coarse code to tune, according to the coarse-tuned output frequency, a PLL output frequency of a PLL output signal generated by the VCO

Methodology Applied
Scientific EffectChirp signal generation:

Implementation Method 2

A crystal oscillator, particularly one made of quartz crystal, is distorted by an electric field when voltage is applied to an electrode near or on the crystal. This property is known as electrostriction or inverse piezoelectricity. When the field is removed, the quartz, which oscillates in a precise frequency, generates an electric field as it returns to its previous shape, and this can generate an oscillating voltage that can be used as a precise clock signal.

Methodology Applied
Scientific EffectPiezoelectric effect: Piezoelectric Effect

Implementation Method 3

setting the PLL to an operating mode responsive to detecting the steady state operation of the crystal oscillator, such that, in the normal operating mode, the control voltage of the VCO is regulated by a feedback loop of the PLL as a function of a reference clock signal received at the reference frequency from the crystal oscillator

Methodology Applied
Scientific EffectPhase-locked loop feedback: Feedback

Data Source

PatentUS10958275B2Fast wakeup for crystal oscillator
Publication Date: 2021.03.23 SHENZHEN GOODIX TECH CO LTD
  • US10958275B2 patent drawing
  • US10958275B2 patent drawing
  • US10958275B2 patent drawing

AI summary

Techniques are described for fast wakeup of a crystal oscillator circuit. Embodiments operate in context of a crystal oscillator coupled with a phase-locked loop (PLL). For example, prior to entering sleep mode, embodiments retain a previously obtained coarse code used to coarse-tune a voltage controlled oscillator of the PLL. On wakeup, the PLL is configured in a chirp mode, in which the retained coarse code and a sweep voltage are used to generate a chirp signal at, or close to, a target stimulating frequency for the crystal oscillator. The chirp signal can be used to inject energy into the crystal oscillator, thereby causing the crystal oscillator to move from sleep mode to steady state oscillation relatively quickly.