Retention Flip-Flop Power Rail Isolation During Power Collapse

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Solution Overview

Problem

Power management in integrated circuits (ICs) faces challenges in reducing power consumption while minimizing data loss and performance delays during power collapse events, as existing methods either result in significant overhead or data corruption due to voltage degradation across flip-flop portions.

Innovation Solution

The integration of a collapsible power rail and a constant power rail within flip-flops, with shared external power management circuitry that combines clock and retention signals to isolate master and slave portions, ensuring data retention during power collapse without increased chip area or signal congestion.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If power is removed from the collapsible power rail during power collapse, then power consumption is reduced, but voltage degradation causes data loss or corruption in flip-flop portions

Engineering Contradiction:
Improvepower consumptionVSAvoiddata retention integrity
Core Design Contradiction:
Loss of energyVSReliability

Solution Approach 1:

The flip-flop is divided into master and slave portions, each with separate power rail connections. The master portion connects to both constant and collapsible power rails, while the slave portion connects only to the constant power rail. This segmentation allows differential power management during collapse events, isolating the slave portion from voltage degradation while permitting master portion power reduction.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A power isolation mechanism acts as an intermediary between the master and slave portions during power collapse. The isolation logic, controlled by the power management circuitry, prevents direct coupling between master and slave when the collapsible power rail collapses, blocking voltage degradation from propagating to the slave portion while maintaining data retention.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If operational data is moved to remote memory location prior to power down, then data loss is prevented, but retrieval operation delays resumption of computing functionality

Engineering Contradiction:
Improvedata loss preventionVSAvoidresumption delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The slave portion of the flip-flop is preliminarily configured to retain data during power collapse through dedicated constant power rail connection and isolation logic. This preliminary setup eliminates the need for data migration to remote memory before power down, as the slave portion already maintains data integrity during collapse events.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The flip-flop's slave portion serves itself by maintaining data retention independently during power collapse through its dedicated constant power rail connection. The power management circuitry automatically manages the isolation and retention without requiring external memory operations, enabling self-sufficient data preservation during power events.

Inventive Principle:
Principle #25Self-service

3Device complexity

If master and slave portions share common power rail, then circuit complexity is reduced, but voltage degradation affects both portions causing data corruption

Engineering Contradiction:
Improvepower rail configurationVSAvoiddata integrity during collapse
Core Design Contradiction:
Device complexityVSReliability

Solution Approach 1:

The power supply architecture is segmented into constant and collapsible power rails with differentiated connections. The master portion receives power from both rails, while the slave portion receives power only from the constant rail. This segmentation creates electrical isolation between portions during collapse, preventing voltage degradation from affecting the slave portion while maintaining relatively simple power rail infrastructure.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentEP3353891B1Power management with flip-flops
Publication Date: 2021.04.07 QUALCOMM INC
  • EP3353891B1 patent drawingFigure 1
  • EP3353891B1 patent drawingFigure 2
  • EP3353891B1 patent drawingFigure 3

AI summary

An integrated circuit (IC) is disclosed herein for managing power with flip-flops having a retention feature. In an example aspect, an IC includes a constant power rail (KPR), a collapsible power rail (CPR), multiple flip-flops (206), and power management circuitry (306). Each flip-flop (206) of the multiple flip-flops includes a master portion (302) that is coupled to the collapsible power rail (CPR) and a slave portion (304) that is coupled to the constant power rail (KPR). The power management circuitry (306) is configured to combine a clock signal (208) and a retention signal (210) into a combined control signal (CCS) and to provide the combined control signal to each flip-flop of the multiple flip-flops.