Retention-Gate Regulator Circuit for Low-Power Stable Output
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Linear regulators used in semiconductor devices experience increased power consumption due to continuous current flow through operational amplifier circuits, which is a challenge for devices requiring low power consumption, especially in space applications like artificial satellites.
Innovation Solution
A semiconductor device design incorporating an operational amplifier circuit, retention transistors, and capacitors to reduce power consumption by minimizing self-consuming current, allowing for stable and reliable operation with low off-state current transistors and complementary signals.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an operational amplifier circuit is continuously operated in a linear regulator, then the regulator can maintain stable output potential, but power consumption increases due to continuous current flow
Solution Approach 1:
The operational amplifier is operated periodically rather than continuously. A control transistor selectively connects the operational amplifier to the circuit only during specific periods when potential adjustment is needed, while disconnecting it during other periods to eliminate continuous current flow and reduce power consumption while maintaining stable output when required
Solution Approach 2:
The operational amplifier is extracted from continuous operation and activated only when needed. The control mechanism separates the operational amplifier's function from continuous operation, enabling it to be engaged only during periods when potential stabilization is necessary, thereby reducing overall power consumption
2Use of energy by moving object
If the frequency of potential writing is reduced to lower power consumption, then the retention period must be extended, but maintaining potential retention over extended periods challenges system reliability
Solution Approach 1:
The operational amplifier performs potential writing in advance during active periods, preparing the system for extended retention phases. By establishing the correct potential beforehand when the amplifier is active, the system can maintain that potential during extended idle periods without requiring continuous intervention, thus reducing power consumption while ensuring reliability
Solution Approach 2:
The system uses the inherent stability of the transistor gate to maintain potential automatically during retention periods. Once the operational amplifier sets the potential during active periods, the transistor structure itself maintains the potential without requiring continuous external control, enabling extended retention with minimal power consumption
Data Source
AI summary
A low-power semiconductor device is provided. A retention transistor is provided between a control circuit and an output transistor. An output terminal of the control circuit is electrically connected to one of a source and a drain of the retention transistor, and the other of the source and the drain of the retention transistor is electrically connected to a gate of the output transistor. A node to which the other of the source and the drain of the retention transistor and the gate of the output transistor are electrically connected is a retention node. When the retention transistor is in an on state, a potential corresponding to a potential output from the control circuit is written to the retention node. Then, when the retention transistor is in an off state, the potential of the retention node is retained. Thus, a gate potential of the output transistor can be kept at a constant value even when the control circuit is off. Accordingly, even when the control circuit is off, a constant potential can be continuously output from one of a source and a drain of the output transistor, for example.