Reticle Carrier Structure for Low-Capacitance Particle Control

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Solution Overview

Problem

Residual charges on lithography masks can attract particles in reticle carriers, leading to pattern defects in semiconductor manufacturing, which result in low quality and high scrap rates due to the electrostatic attraction of contaminants.

Innovation Solution

A reticle carrier is designed with reduced capacitance between its inner baseplate and the mask, utilizing support pins to quickly discharge residual charges, thereby minimizing the attraction of particles to the mask.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the reticle carrier uses a conventional baseplate design with higher capacitance, then the structural stability is maintained, but residual charges remain on the reticle longer, attracting particles and causing pattern defects

Engineering Contradiction:
Improvepattern qualityVSAvoidparticle attraction
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent changes the electrical parameter (capacitance) of the baseplate by introducing a dielectric layer with specific properties. This parameter change reduces the RC time constant, enabling faster discharge of residual charges and preventing particle attraction to the reticle, thereby resolving the contradiction between maintaining structural stability and reducing harmful electrostatic effects.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The dielectric layer acts as an intermediary between the conductive baseplate and the reticle. It modifies the electrical interaction by reducing capacitance while maintaining mechanical support, serving as a mediator that prevents direct high-capacitance contact that would cause prolonged charge retention and particle attraction.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If the reticle carrier discharges residual charges quickly, then particle attraction is reduced, but additional components like dielectric layers increase device complexity

Engineering Contradiction:
Improvemanufacturing qualityVSAvoidcarrier structure
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The dielectric layer performs multiple functions simultaneously: it reduces capacitance for faster charge discharge, provides electrical insulation, maintains mechanical support for the reticle, and can serve as a protective barrier. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity while achieving reliable charge discharge.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Object-affected harmful factors

If the distance between the baseplate and reticle is increased to reduce capacitance, then particle attraction decreases, but the mechanical support and alignment precision may be compromised

Engineering Contradiction:
Improveelectrostatic attractionVSAvoidreticle alignment
Core Design Contradiction:
Object-affected harmful factorsVSManufacturing precision

Solution Approach 1:

The dielectric layer serves as a precisely controlled intermediary that maintains a fixed, optimized distance between the baseplate and reticle. This intermediary structure ensures consistent spacing that reduces capacitance and electrostatic attraction while providing rigid mechanical support and precise alignment features, preventing compromise of manufacturing precision.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The dielectric layer can have varying properties in different regions to optimize local functions - providing adequate spacing for charge discharge in critical areas while maintaining strong mechanical coupling and alignment in other regions. This localized optimization resolves the contradiction between reducing electrostatic effects and maintaining precision.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This solution reduces pattern defects, enhances semiconductor device manufacturing quality, and decreases scrap rates by efficiently discharging residual charges and preventing particle attraction, thus improving yield.

Implementation Method 1

a residual charge on the reticle from the electrostatic chuck is discharged through the plurality of support pins when the reticle is positioned on the plurality of support pins

Methodology Applied
Scientific EffectElectrical conduction: Conduction (electrical)

Implementation Method 2

retrieving a reticle from an electrostatic chuck of an exposure tool

Methodology Applied
Scientific EffectElectrostatic attraction: Electrostatics

Data Source

PatentUS12189311B2Reticle carrier and associated methods
Publication Date: 2025.01.07 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US12189311B2 patent drawing
  • US12189311B2 patent drawing
  • US12189311B2 patent drawing

AI summary

A reticle carrier described herein is configured to quickly discharge the residual charge on a reticle so as to reduce, minimize, and/or prevent particles in the reticle carrier from being attracted to and/or transferred to the reticle. In particular, the reticle carrier may be configured to provide reduced capacitance between an inner baseplate of the reticle carrier and the reticle. The reduction in capacitance may reduce the resistance-capacitance (RC) time constant for discharging the residual charge on the reticle, which may increase the discharge speed for discharging the residual charge through support pins of the reticle carrier. The increase in discharge speed may reduce the likelihood that an electrostatic force in the reticle carrier may attract particles in the reticle carrier to the reticle. This may reduce pattern defects transferred to substrates that are patterned using the reticle, may increase semiconductor device manufacturing quality and yield, and may reduce scrap and rework of semiconductor devices and/or wafers.