Reticle-Stitched IC Layout for Direct Cross-Die Communication

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Solution Overview

Problem

Integrated circuit devices face limitations in bandwidth and latency due to the use of interposers for die-to-die communication, and the size of dies is constrained by lithography system reticle limits, preventing efficient scaling beyond a single patterning size.

Innovation Solution

Reticle stitching is employed to create a high-capacity integrated circuit by patterning multiple die areas within individual reticle limits, allowing communication wires to overlap and directly transfer signals between die areas without an interposer, thereby forming a monolithic die with improved bandwidth and reduced latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If multiple dies are connected via an interposer for die-to-die communication, then the integrated circuit can exceed the reticle limit size, but the bandwidth and latency of off-die communication deteriorates

Engineering Contradiction:
Improvedie sizeVSAvoidcommunication speed
Core Design Contradiction:
Area of stationary objectVSSpeed

Solution Approach 1:

The patent divides the large integrated circuit into multiple smaller dies, each within the reticle limit, that are stitched together to form a monolithic structure. This segmentation allows the overall circuit to exceed the reticle limit while maintaining intra-die communication speeds, as each segment is patterned separately and then joined without requiring interposer-based die-to-die communication

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent merges multiple patterned dies into a single monolithic integrated circuit structure through reticle stitching. By combining the dies in this manner, the communication between what would traditionally be separate dies becomes intra-die communication, eliminating the need for interposers and improving bandwidth and latency

Inventive Principle:
Principle #5Merging (Combining)

2Area of stationary object

If the die size is increased beyond the reticle limit, then the integrated circuit capacity increases, but the patterning precision and manufacturing feasibility deteriorates

Engineering Contradiction:
Improvedie sizeVSAvoidpatterning precision
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The patent segments the large integrated circuit into multiple smaller dies, each within the reticle limit, that are stitched together. This allows each die to be patterned with high precision using standard lithography systems, while the overall circuit achieves the desired large size and high capacity

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent transitions from a single-plane patterning approach to a multi-layer, multi-die stacking approach. By utilizing the vertical dimension and stitching multiple dies together, the system overcomes the reticle limit without compromising the patterning precision of individual dies

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Adaptability or versatility

If an interposer is used for die-to-die communication, then the integrated circuit can be assembled with multiple dies, but the bandwidth and latency performance deteriorates compared to intra-die communication

Engineering Contradiction:
Improvedie assembly capabilityVSAvoidcommunication latency
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The patent merges multiple dies into a monolithic structure through reticle stitching, eliminating the interposer and creating continuous intra-die communication paths. This merging preserves the adaptability of multi-die assembly while achieving the low latency of intra-die communication by making the stitched boundaries invisible to signal propagation

Inventive Principle:
Principle #5Merging (Combining)

Data Source

PatentUS12593675B2Reticle stitching to achieve high-capacity integrated circuit
Publication Date: 2026.03.31 ALTERA CORP
  • US12593675B2 patent drawing
  • US12593675B2 patent drawing
  • US12593675B2 patent drawing

AI summary

A reticle-stitched integrated circuit is provided. The reticle-stitched integrated circuit extends over a first die area and a second die area of an integrated circuit wafer. While individually the first die area and the second die area are within their respective reticle limits, collectively the first die area and the second die area exceed the reticle limit. A first layer of the reticle-stitched integrated circuit may have communication wires that remain exclusively in only one of the first die area and the second die area. A second layer of the reticle-stitched integrated circuit may have communication wires that overlap the first die area and the second die area, thereby allowing communication between the two die areas and enabling the reticle-stitched integrated circuit to exceed the limit of the reticle.