Reticle Data Sub-Geometry Removal for IC Fabrication

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Solution Overview

Problem

Integrated circuit fabrication faces challenges with sub-geometries and singularities in photomask data, leading to manufacturing issues, lower wafer yields, and increased costs due to unresolved features below the minimum feature size, which existing methods struggle to address effectively.

Innovation Solution

The method involves forming reticle data, detecting sub-geometries or singularities, and applying unit cells or patch cells to remove these issues, thereby ensuring the data is free of such features, which are then used to fabricate integrated circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If complicated Boolean algorithms are used to generate non-design layers, then design functionality is improved, but sub-geometries and singularities are introduced that cause manufacturing problems

Engineering Contradiction:
Improvedesign functionalityVSAvoidfeature size accuracy
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies preliminary cleaning actions to reticle data before photomask fabrication to detect and remove sub-geometries and singularities. By performing this cleanup operation in advance, the system prevents manufacturing defects from occurring, resolving the contradiction between using complex Boolean algorithms and maintaining manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If sub-geometries are not removed, then manufacturing complexity is reduced, but wafer yield decreases due to unexpected parasitic devices

Engineering Contradiction:
Improvemanufacturing complexityVSAvoidwafer yield
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The system performs self-service by automatically detecting and removing its own sub-geometries and singularities through algorithmic analysis of reticle data. This self-cleaning process eliminates parasitic devices that would otherwise reduce wafer yield, resolving the contradiction between manufacturing simplicity and product reliability.

Inventive Principle:
Principle #25Self-service

3Productivity

If simple sizing rules are applied to remove sub-geometries, then processing speed is improved, but some sub-geometries and singularities remain unresolved

Engineering Contradiction:
Improveprocessing speedVSAvoidsub-geometry removal completeness
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent changes the parameters of sub-geometries by analyzing their dimensional characteristics and applying targeted cleaning rules. Instead of using simple uniform sizing, the system adjusts parameters based on specific geometric features, achieving complete removal while maintaining processing efficiency.

Inventive Principle:
Principle #35Parameter changes

4Adaptability or versatility

If reticle data contains singularities, then design flexibility is maintained, but mask inspection difficulty increases

Engineering Contradiction:
Improvedesign flexibilityVSAvoidmask inspection difficulty
Core Design Contradiction:
Adaptability or versatilityVSDifficulty of detecting and measuring

Solution Approach 1:

The system extracts and removes singularities from reticle data through automated detection and cleaning algorithms. By taking out these problematic features before photomask fabrication, the system maintains design flexibility while eliminating inspection difficulties, as the cleaned reticle data produces cleaner mask patterns.

Inventive Principle:
Principle #2Taking out (Extraction)

Data Source

PatentUS8692380B2Integrated circuit system with sub-geometry removal and method of manufacture thereof
Publication Date: 2014.04.08 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8692380B2 patent drawing
  • US8692380B2 patent drawing
  • US8692380B2 patent drawing

AI summary

A method of manufacture of an integrated circuit system includes: forming reticle data; detecting a sub-geometry, a singularity, or a combination thereof in the reticle data; applying a unit cell, a patch cell, or a combination thereof for removing the sub-geometry, the singularity, or the combination thereof from the reticle data; and fabricating an integrated circuit from the reticle data.