Compensating Reset for Retimed Circuitry
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Solution Overview
Problem
After retiming operations on integrated circuits, the original reset sequence may not effectively reset the retimed registers, leading to unpredictable behavior and the need for an updated reset sequence to ensure proper initialization.
Innovation Solution
Implementing a delayed reset sequence generated by CAD tools, which includes logic circuitry, configuration circuitry, and an initialization module to automatically adjust the reset sequence by counting clock cycles, ensuring accurate resetting of retimed circuitry.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If register retiming is performed to improve circuit performance, then clock frequency and performance increase, but the original reset sequence becomes ineffective and circuit reliability deteriorates
Solution Approach 1:
The patent calculates the required delay value before retiming operations using CAD tools, then implements this delay in the reset sequence. By performing the delay calculation and compensation in advance, the reset sequence is pre-adjusted to account for register movements, ensuring reliable resetting after retiming without affecting the performance improvements gained from retiming.
2Manufacturing precision
If CAD tools are used to calculate delay values and generate updated reset sequences, then reset accuracy improves, but device complexity and manufacturing complexity increase
Solution Approach 1:
The patent employs CAD tools to automatically calculate the delay value based on the retiming operations performed. The initialization module uses this automatically generated delay value to construct the updated reset sequence without requiring manual intervention. This self-service approach ensures high reset accuracy while minimizing the increase in device complexity, as the system autonomously adapts to retiming changes.
Data Source
AI summary
A compensating initialization module may be automatically inserted into a design to compensate for register retiming which changes the designs behavior under reset. The device configuration circuitry may provide an adjustment sequence length as well as a start signal to the initialization module to properly reset the retimed user logic implemented on the integrated circuit after initial configuration and unfreezing of the integrated circuit. The auto initialization module may control the c-cycle initialization process and indicate to the user logic when c-cycle initialization has completed. The user logic may subsequently begin a user-specified reset sequence. When the user-specified reset sequence ends, the user logic implemented on the integrated circuit may begin normal operations. Additionally, a user reset request may also trigger the auto initialization module to begin a reset process.