Retiming-Aware Configuration for Critical Cyclic Logic Paths
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Solution Overview
Problem
Current configuration methods for programmable integrated circuit devices do not adequately account for the potential improvements from retiming, particularly neglecting critical cyclic logic paths that remain longer after retiming, leading to suboptimal optimization of circuit designs.
Innovation Solution
A method that identifies and prioritizes critical and near-critical cyclic logic paths for optimization, applying timing optimizations and retiming techniques to these paths while allowing other paths to be shortened by retiming, using techniques such as cycle slack analysis and virtual retiming to focus optimization efforts on limiting factors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If known configuration methods focus on optimizing the path with the longest delay, then optimization techniques can reduce those delays, but they neglect critical cyclic logic paths that remain longer after retiming of other paths
Solution Approach 1:
The patent applies preliminary action by performing retiming analysis and identifying critical cyclic logic paths before final optimization. The method预先 determines which paths will remain critical after retiming by analyzing cyclic dependencies, allowing optimization techniques to be applied in advance to these specific paths rather than treating all paths equally.
Solution Approach 2:
The patent implements feedback by using retiming awareness to inform optimization decisions. The system analyzes the impact of retiming on cyclic paths and uses this information to adjust optimization priorities, creating a feedback loop where retiming outcomes guide subsequent optimization efforts on critical cyclic logic paths.
2Speed
If retiming is applied to shorten logic paths, then clock speeds can be improved, but critical cyclic logic paths may remain unoptimized
Solution Approach 1:
The patent applies local quality by treating critical cyclic logic paths differently from other logic paths. Instead of uniform optimization, the method identifies specific cyclic paths that maintain criticality after retiming and applies targeted optimization techniques to these local areas, recognizing that different parts of the circuit require different optimization approaches.
Solution Approach 2:
The patent segments the logic paths into categories: cyclic paths that remain critical after retiming versus other paths. This segmentation allows the system to apply retiming to non-critical paths while maintaining focused optimization efforts on critical cyclic paths, thereby improving overall clock speed without neglecting important path optimizations.
3Loss of time
If optimization focuses on unidirectional logic paths, then those paths can be shortened, but cyclic logic paths become the new bottleneck
Solution Approach 1:
The patent uses feedback by continuously monitoring which paths become bottlenecks after optimization. The retiming awareness mechanism detects when cyclic paths become the new critical paths following optimization of unidirectional paths, and automatically adjusts optimization priorities to address these emerging bottlenecks, preventing them from becoming performance limitations.
Data Source
AI summary
A method of configuring an integrated circuit device with a user logic design includes analyzing the user logic design to identify critical and near-critical cyclic logic paths within the user logic design, applying timing optimizations to the critical and near-critical cyclic logic paths, and retiming logic paths other than the critical and near-critical cyclic logic paths.