Retired Page Utilization for NAND Flash Write Capacity

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Solution Overview

Problem

NAND Flash memory technologies face challenges in cost reduction and endurance due to limited in-place updates, bulk erasure requirements, and high per-bit costs, necessitating innovative methods to enhance write capacity and extend device lifespan.

Innovation Solution

The implementation of Retired Page Utilization (RPU) allows for the reuse of retired memory pages by selecting suitable retired groups of memory cells to store data units without erasure, utilizing a pool of retired pages and applying encoding schemes to optimize data representation and storage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If in-place updates are performed in NAND Flash memory, then write operations can be simplified, but the number of times data can be updated is severely limited due to charge level constraints

Engineering Contradiction:
Improvewrite operation simplicityVSAvoidupdate cycle endurance
Core Design Contradiction:
Ease of operationVSDuration of action of moving object

Solution Approach 1:

The patent implements a retired page pool mechanism where pages that can no longer be updated in-place are discarded from active use and recovered for alternative purposes. Specifically, retired pages are stored in a pool and can be utilized for writing data with relaxed constraints (allowing reads but not writes to retired pages), thereby extending the effective lifespan of the memory device by repurposing pages that would otherwise be completely discarded after retirement.

Inventive Principle:
Principle #34Discarding and recovering

2Ease of manufacture

If bulk erasure is performed on memory blocks, then retired pages can be cleared for reuse, but the process is time-consuming and reduces device lifespan due to limited erasure cycles

Engineering Contradiction:
Improvepage reusabilityVSAvoiderasure time
Core Design Contradiction:
Ease of manufactureVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by maintaining a pool of retired pages that have been pre-selected and prepared for potential reuse. When a write operation needs to occur, the system first checks if suitable retired pages are available in the pool before proceeding with bulk erasure operations. This preliminary checking and pooling mechanism reduces the frequency and timing of bulk erasure operations, thereby reducing time loss and extending device lifespan.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If traditional page retirement is implemented, then pages are discarded after failed write attempts, but this reduces the effective storage capacity and write performance of the device

Engineering Contradiction:
Improvewrite operation reliabilityVSAvoidwrite capacity
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent applies universality by enabling retired pages to serve multiple functions: they can be stored in the retired page pool for potential future reuse, they can be written to with relaxed constraints (allowing reads but not writes), and they contribute to the overall storage capacity of the device. This multi-functional use of retired pages increases the effective write capacity and productivity without compromising write operation reliability.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS10521339B2Retired page utilization (RPU) for improved write capacity of solid state drives
Publication Date: 2019.12.31 TECHNION RES & DEV FOUND LTD
  • US10521339B2 patent drawing
  • US10521339B2 patent drawing
  • US10521339B2 patent drawing

AI summary

A method for writing data to a memory module, the method may include determining to write a representation of a data unit to a retired group of memory cells; searching for a selected retired group of memory cells that can store a representation of the data unit without being erased; and writing the representation of the data unit to the selected retired group of memory cells.