Retrograde Wells in CMOS Transistors for Leakage Control
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Solution Overview
Problem
The formation of transistor devices in CMOS technology faces challenges such as short channel effects, increased leakage currents, and threshold voltage variability due to the reduction in channel length, which degrades the performance and density of FETs.
Innovation Solution
The method involves forming transistor devices with retrograde wells using a substrate with N-active and P-active regions, where layers of silicon-carbon and silicon-germanium are epitaxially deposited on recessed surfaces, reducing the need for carbon ion implantation and minimizing step height differences, thereby improving electrostatic control and reducing short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If the channel length of FETs is significantly decreased to improve switching speed and increase device density, then the operating speed and density are improved, but the electrical potential of the channel is adversely affected by the drain potential, leading to larger leakage currents and degraded active switch characteristics
Solution Approach 1:
The patent applies local quality by creating retrograde wells with non-uniform doping profiles where the dopant concentration varies with depth. Specifically, the wells have higher dopant concentrations at deeper regions compared to shallower regions, which locally enhances the potential barrier at the source-channel and drain-channel interfaces. This localized doping strategy targets the specific regions where punch-through effects occur, providing electrostatic control precisely where needed without requiring a complete redesign of the entire device structure.
Solution Approach 2:
The retrograde wells are formed prior to the formation of the channel region and source/drain regions. By establishing the doped well structures in advance, the patent creates a pre-configured potential landscape that will subsequently confine the channel electrostatics. This preliminary action ensures that when the short-channel device is operated, the retrograde wells are already in place to prevent punch-through effects, addressing the short channel problem before the device is fully assembled and tested.
2Manufacturing precision
If carbon ion implantation is used to form retrograde wells, then the doping profile can be controlled, but significant step height differences are introduced between regions with and without carbon doping
Solution Approach 1:
The patent extracts the carbon doping step from the retrograde well formation process. Instead of using carbon ion implantation to create the retrograde doping profile, the invention separates the doping function (achieved through selective epitaxial growth with dopant incorporation) from the carbon introduction function. This extraction eliminates the step height problems associated with carbon implantation while retaining the benefits of retrograde doping profiles, as the dopants are incorporated during the epitaxial growth process which naturally conforms to the substrate topography.
Solution Approach 2:
The patent introduces selective epitaxial growth as an intermediary process between substrate preparation and final device formation. This intermediary process uses silicon epitaxial growth with in-situ dopant incorporation to create the retrograde wells. The epitaxial growth acts as a mediator that achieves precise doping profiles through controlled dopant introduction during growth, while simultaneously avoiding the topography disruption caused by ion implantation. The process parameters of epitaxial growth (temperature, pressure, gas flow rates) serve as intermediaries to control the doping concentration and depth profile.
3Productivity
If the separation distance between source and drain regions is reduced to increase device density, then more devices can be packed in a given area, but it becomes difficult to efficiently inhibit the electrical potential of the channel from being adversely affected by the drain potential
Solution Approach 1:
The patent addresses the punch-through problem by transitioning from a two-dimensional planar doping approach to a three-dimensional retrograde doping structure. Instead of varying dopant concentration only laterally across the channel, the retrograde wells introduce a vertical dimension to the doping profile, with dopant concentration increasing with depth. This vertical doping gradient creates an additional electrostatic control dimension that effectively suppresses punch-through effects even when the lateral source-drain separation is minimized for high device density.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the operational characteristics of transistors by reducing leakage currents, improving drive current strength, and minimizing random dopant fluctuations, leading to more efficient and densely packed transistor devices with reduced dynamic power requirements.
Implementation Method 1
layers of silicon-carbon and silicon-germanium are epitaxially deposited on recessed surfaces
Data Source
AI summary
A device includes a substrate having an N-active region and a P-active region, a layer of silicon-carbon positioned on an upper surface of the N-active region, a first layer of a first semiconductor material positioned on the layer of silicon-carbon, a second layer of the first semiconductor material positioned on an upper surface of the P-active region, and a layer of a second semiconductor material positioned on the second layer of the first semiconductor material. An N-type transistor is positioned in and above the N-active region and a P-type transistor is positioned in and above the P-active region.