Hardware Return Pointer Encryption for Buffer Overflow Protection
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing methods to prevent buffer overflow attacks often incur significant performance overhead and require recompilation of existing code, which is undesirable.
Innovation Solution
A processor with hardware logic that encrypts the instruction pointer and stores it on the stack, allowing for decryption and redirection of execution to prevent buffer overflow attacks without the need for recompilation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If software-based methods are used to prevent buffer overflow attacks, then security is improved, but performance overhead increases significantly
Solution Approach 1:
The patent replaces software-based buffer overflow prevention methods with a hardware-based solution. The hardware logic circuitry automatically encrypts return addresses using a hardware encryption unit and decrypts them upon retrieval, eliminating the need for software intervention and reducing performance overhead associated with software-based security measures.
Solution Approach 2:
The system performs self-service security operations where the hardware logic automatically encrypts return addresses before storing them on the stack and decrypts them automatically when retrieving. This autonomous hardware-based protection eliminates the need for external software security measures and reduces overall system overhead.
2Reliability
If software-based methods are used to prevent buffer overflow attacks, then security is improved, but recompilation of existing code is required
Solution Approach 1:
The hardware-based solution provides self-service security functionality that works with existing code without requiring recompilation. The hardware logic automatically handles encryption and decryption of return addresses, making the security feature transparent to existing software and eliminating the need for code recompilation.
Solution Approach 2:
The hardware encryption and decryption logic acts as an intermediary between the existing code and the security requirements. This intermediary layer handles the security operations automatically, allowing existing code to continue functioning without modification while still benefiting from buffer overflow protection.
3Reliability
If return address encryption is implemented, then security against buffer overflow attacks is improved, but device complexity increases
Solution Approach 1:
The patent merges the encryption and decryption functionality into a single hardware logic circuitry component that operates automatically on return addresses. By combining these operations within the same hardware structure, the solution reduces overall device complexity compared to having separate encryption and decryption systems.
Solution Approach 2:
The hardware logic performs self-service encryption and decryption operations automatically without requiring external control or complex management mechanisms. This autonomous operation simplifies the overall system architecture by eliminating the need for additional control logic and management overhead.
Data Source
AI summary
A processor, a method and a computer-readable storage medium for encrypting a return address are provided. The processor comprises hardware logic configured to encrypt an instruction pointer and push the encrypted instruction pointer onto a stack. The logic is further configured to retrieve the encrypted instruction pointer from the stack, decrypt the instruction pointer and redirect execution to the decrypted instruction pointer.