Reverse-bridge multi-die interconnect for IC packages

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Solution Overview

Problem

Signal and power integrity issues are challenging for complex integrated-circuit components due to inductance loops and impedance peak profiles in packaging, hindering their utility.

Innovation Solution

Passive devices such as decoupling capacitors are located beside the integrated-circuit (IC) die edges and connected through interconnect bridges, including reverse-bridge configurations that occupy the same Z-height as the IC die edge, facilitating communication and heat management.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If passive devices are located close to IC die edges with reverse-bridge interconnect configuration, then signal and power integrity is improved, but device complexity increases

Engineering Contradiction:

Improvesignal and power integrityVSAvoidpackage structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent utilizes the Z-height dimension by positioning passive devices at the same vertical level as the IC die edge rather than traditional planar arrangements. This three-dimensional placement optimizes signal paths and reduces inductance loops without significantly increasing overall package footprint, thereby improving signal integrity while controlling complexity.

Inventive Principle:

Principle #17Another dimension (Dimensionality change)

Solution Approach 2:

The reverse-bridge interconnect structure serves as an intermediary element that directly connects the IC die to nearby passive devices through optimized pathways. This intermediate structure reduces the length of signal paths and minimizes impedance variations, improving power and signal integrity while consolidating multiple functions into a single integrated component.

Inventive Principle:

Principle #24Intermediary (Mediator)

2Reliability

If passive devices are placed beside IC die edges, then inductance loops are reduced, but manufacturing precision requirements increase

Engineering Contradiction:

Improveinductance loop reductionVSAvoiddevice placement precision

Core Design Contradiction:

ReliabilityVSManufacturing precision

Solution Approach 1:

The patent merges the IC die, passive devices, and interconnect structures into a closely integrated assembly where passive devices are positioned immediately adjacent to IC die edges. This consolidation minimizes the area enclosed by current loops, reducing inductance. The merged structure also allows for standardized manufacturing processes that can accommodate the tight tolerances required.

Inventive Principle:

Principle #5Merging (Combining)

3Reliability

If reverse-bridge interconnect configuration is used, then impedance peak profiles are minimized, but ease of manufacture decreases

Engineering Contradiction:

Improveimpedance peak profileVSAvoidassembly process complexity

Core Design Contradiction:

ReliabilityVSEase of manufacture

Solution Approach 1:

The reverse-bridge interconnect configuration changes the geometric parameters of the signal path by creating a folded or bent connection route between the IC die and passive devices. This parameter change in the interconnect layout optimizes impedance characteristics and reduces peak profiles. The standardized design of this parameter change allows for automated assembly processes, partially offsetting the increased manufacturing complexity.

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS11664317B2Reverse-bridge multi-die interconnect for integrated-circuit packages

Publication Date: 2023.05.30 INTEL CORP

AI summary

Disclosed embodiments include die-edge level passive devices for integrated-circuit device packages that provide a low-loss path to active and passive devices, by minimizing inductive loops.