Reverse Current Detector Circuit Power Reduction
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Solution Overview
Problem
Existing reverse current detectors in DCDC converters consume significant power due to constant bias current requirements, especially at high operating frequencies, which is undesirable in low-power converters.
Innovation Solution
A reverse current detector circuit utilizing a logic gate to gate the reverse current sensing voltage, allowing the flip-flop circuit to be powered down for most of the switching cycle, reducing power consumption by only operating during the short period when reverse current sensing occurs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If an analog comparator is used for reverse current sensing, then the reverse current detection function is achieved, but the current consumption increases significantly
Solution Approach 1:
The patent extracts only the essential sensing function from a full comparator circuit by using a simplified voltage sensing node connected directly to a flip-flop, eliminating the need for constant bias current while maintaining reverse current detection capability
Solution Approach 2:
The sensing operation is performed periodically only during specific phases of the switching cycle when reverse current may occur, rather than continuously, allowing the detector to power down during other periods and reduce average current consumption
2Reliability
If a flip-flop circuit is used to detect reverse current, then the detection function is provided, but the current consumption remains not negligible
Solution Approach 1:
The flip-flop circuit is clocked only during specific phases of the switching cycle when reverse current sensing is needed, allowing it to enter a low-power state during other periods and significantly reducing average current consumption
Solution Approach 2:
The patent removes unnecessary circuitry from the flip-flop implementation by using a simplified version that only performs the essential sensing function without additional overhead, reducing its inherent current consumption
3Measurement precision
If the detector operates continuously, then detection accuracy is maintained, but power consumption increases
Solution Approach 1:
The detector operates periodically only during critical phases of the switching cycle when reverse current may occur, maintaining detection accuracy during these periods while allowing the circuit to power down during other periods to reduce average power consumption
Solution Approach 2:
The sensing operation is triggered in advance at specific points in the switching cycle where reverse current is most likely to occur, ensuring detection accuracy is maintained when needed while avoiding continuous operation
Data Source
Figure 1
AI summary
A circuit (1) is described for detecting a reverse current condition of a DCDC converter (2). This circuit uses a simple logic gate such as an AND gate to sense the voltage on a determined node (7) of the DCDC converter, and the propagation of the gated signal (27) is controlled using the timing control signals SW1 and SW2 of the DCDC converter, together with delay cells (16 and 17), to ensure that the positive or negative state of the sensed voltage at said node (7) is propagated cleanly through the logic gate (18), the flip-flop or latch circuit (19) and the up-down counter (29) to the output timing control circuit (25). The up-down counter is incremented or decremented in dependence on the presence or absence of a reverse current condition at said node, and the count value (24) of the up-down counter determines the duration of the on-period of the second-phase timing control signal SW2.