Self-Calibrating Reverse Current Sensing Regulator
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Solution Overview
Problem
Switching regulators with small output inductors and high load voltages experience inefficiencies due to large errors in reverse current sensing circuits caused by limited response time and propagation delay, leading to unacceptable reverse current overshoots, which are difficult to compensate for in unknown application conditions.
Innovation Solution
A self-calibrating reverse current sensing regulator system that includes a driver logic circuit, a comparator, and an evaluator to monitor the drain voltage of the low side FET, providing an offset to adjust the trip point of the comparator based on measured voltage deviations from a threshold, thereby correcting for overshoots and undershoots.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a traditional RCS circuit is used with small output inductors and high switching frequencies, then the regulator can detect reverse current conditions, but large errors occur due to limited response time and propagation delay causing unacceptable reverse current overshoot
Solution Approach 1:
The patent applies preliminary action by introducing an offset to the RCS comparator trip point that anticipates the propagation delay. Instead of waiting for the delay to occur and then correcting, the system pre-adjusts the trip point to trigger the LS FET turn-off earlier, compensating for the known delay characteristics of the driver circuit. This allows the system to maintain accurate reverse current detection despite the inherent time delay in the control loop.
2Measurement precision
If a fixed offset is introduced to the RCS function to compensate for propagation delay, then the response time error can be reduced, but the design is limited to known application voltages and components
Solution Approach 1:
The patent implements dynamics by making the offset value adjustable rather than fixed. The system includes an offset adjustment mechanism that allows the trip point offset to be tuned based on specific application requirements, including different output voltages, inductor values, and driver propagation delays. This dynamic adjustment capability enables the same regulator design to be adapted to various application conditions while maintaining optimal reverse current detection accuracy.
Solution Approach 2:
The patent applies parameter changes by allowing the RCS comparator trip point offset to be varied as a design parameter. By changing the offset parameter based on application-specific characteristics (voltage, current, timing requirements), the system can optimize performance for different scenarios without being locked into a single fixed configuration. This parameter adjustability directly addresses the limitation of fixed-offset designs.
3Reliability
If the RCS circuit reacts earlier to compensate for delay, then reverse current overshoot is reduced, but the trip point becomes inaccurate for unknown application conditions
Solution Approach 1:
The patent implements feedback by incorporating a calibration mechanism that measures the actual reverse current behavior under specific application conditions and uses this information to adjust the offset parameter. The system includes feedback loops that monitor the effectiveness of the offset compensation and make adjustments to optimize both the early detection capability and the trip point accuracy. This feedback-driven approach ensures that the system maintains reliable reverse current protection while adapting to unknown application conditions.
Data Source
AI summary
A reverse current sensing (RCS) regulator system and method is provided. One embodiment of the invention includes a RCS regulator system. The system comprises a RCS comparator that monitors a drain voltage of a LS FET and is configured to switch states at a zero crossing point to provide an indication of the start of a reverse current condition. The system further comprises a RCS evaluator that measures a drain voltage of the LS FET upon receiving an indication that the LS FET has been turned off by the driver logic circuit and adjusts an offset to the RCS comparator to adjust the trip point of the RCS comparator relative to the drain voltage if the measured drain voltage falls outside a predetermined threshold.


