Reverse Halo Implantation for MOSFET Gate Stack Protection

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Solution Overview

Problem

The reduction in gate length of MOSFETs leads to severe short channel effects, including decreased threshold voltage and increased leakage current, which complicates large-scale production of integrated circuits, and existing reverse Halo implantation methods often deteriorate the metal gate stack.

Innovation Solution

A method for manufacturing a semiconductor device that involves forming a reverse Halo implantation region by performing high-energy n-type or p-type dopant implantation through an opening created by removing the dummy gate, allowing for the formation of a reverse Halo implantation region without damaging the gate stack, and subsequent annealing to activate the dopants.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If reverse Halo implantation is performed after gate stack formation to alleviate short channel effects, then threshold voltage control is improved, but gate stack performance deteriorates due to dopant penetration causing gate leakage current

Engineering Contradiction:
Improvethreshold voltage controlVSAvoidgate stack performance
Core Design Contradiction:
Manufacturing precisionVSReliability

Solution Approach 1:

The patent applies preliminary action by performing reverse Halo implantation before gate stack formation rather than after. The method includes: forming source and drain regions, performing reverse Halo implantation into the channel region, then forming the gate stack. This sequence ensures the gate stack is not exposed to high-energy dopant ions that would cause damage and gate leakage, while still achieving the desired threshold voltage control through the reverse Halo profile.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent inverts the conventional process sequence by performing reverse Halo implantation before gate formation instead of after. This inversion of the process order allows the gate stack to be formed in its final configuration before any subsequent processing, protecting it from dopant penetration damage while maintaining the ability to control threshold voltage through the reverse Halo implantation profile.

Inventive Principle:
Principle #13The other way round (Inversion)

2Productivity

If gate length is reduced to increase element density and improve MOSFET performance, then element density is improved, but severe short channel effects occur leading to decreased threshold voltage and increased leakage current

Engineering Contradiction:
Improveelement densityVSAvoidthreshold voltage control
Core Design Contradiction:
ProductivityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating a non-uniform dopant distribution through reverse Halo implantation. The implantation angle and energy are specifically controlled to create higher dopant concentration near the source/drain junctions and lower concentration in the middle of the channel. This localized dopant profiling allows threshold voltage control in short-channel devices without requiring longer gate lengths, thus maintaining high element density while achieving proper electrical characteristics.

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively alleviates short channel effects by adjusting the threshold voltage and reducing leakage current without deteriorating the metal gate stack performance, enabling the production of high-performance semiconductor devices with reduced gate length.

Implementation Method 1

performing reverse Halo implantation to form a reverse Halo implantation region in a channel

Methodology Applied
Scientific EffectIon Implantation: Ion Implantation

Implementation Method 2

activating the dopants in the reverse Halo implantation region by annealing

Methodology Applied
Scientific EffectAnnealing: Annealing

Data Source

PatentUS8420489B2High-performance semiconductor device and method of manufacturing the same
Publication Date: 2013.04.16 INST OF MICROELECTRONICS CHINESE ACAD OF SCI LTD
  • US8420489B2 patent drawing
  • US8420489B2 patent drawing
  • US8420489B2 patent drawing

AI summary

A method of manufacturing a semiconductor device, wherein thermal annealing of the source/drain regions is performed before reverse Halo implantation to form a reverse Halo implantation region. The method comprises: removing the dummy gate to expose the gate dielectric layer, so as to form an opening; performing reverse Halo implantation on the substrate via the opening, so as to form a reverse Halo implantation region in the channel of the device; activating the dopants in the reverse Halo implantation region by annealing; and performing subsequent device processing. Deterioration of the gate stack due to the reverse Halo ions implantation may be avoided by the present invention, such that the reverse Halo ions implantation may be applied to the device with a metal gate stack, and the short channel effects may be alleviated and controlled, thereby the performance of the device is enhanced.