Reverse Read Calibration for 3D NAND Memory Latency

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Solution Overview

Problem

Existing memory sub-systems face challenges in performing fast multi-cell read operations due to latency issues and inaccuracies in read voltage calibration, particularly in 3D NAND devices where capacitive effects and charge loss lead to voltage distribution shifts.

Innovation Solution

The implementation of a reverse read calibration method, where read level voltage adjustments are made from the highest threshold voltage distribution to the lowest, utilizing metadata values and charge loss characteristics to optimize read operations and reduce latency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If conventional read calibration is used, then read operations can be performed, but read overhead time increases and latency increases

Engineering Contradiction:

Improveread overhead timeVSAvoidread operation speed

Core Design Contradiction:

Loss of timeVSProductivity

Solution Approach 1:

The patent applies reverse read calibration by processing threshold voltage distributions in reverse order (from highest to lowest) instead of the conventional sequential order. This inversion allows the system to establish read levels for higher voltage distributions first, which can then serve as references for lower distributions, thereby reducing the overall calibration time and read overhead without sacrificing accuracy.

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent performs preliminary read calibration operations during idle periods or background processes, establishing read level voltage adjustments in advance before actual read operations are needed. This preliminary action allows the system to have pre-computed calibration data ready, reducing the time required during actual read operations and thereby decreasing read overhead time.

Inventive Principle:

Principle #10Preliminary action

2Measurement precision

If conventional read calibration is used, then read operations can be performed, but read operation accuracy decreases due to voltage distribution shifts

Engineering Contradiction:

Improveread operation accuracyVSAvoidread data integrity

Core Design Contradiction:

Measurement precisionVSReliability

Solution Approach 1:

The patent implements feedback mechanisms by monitoring charge loss characteristics and voltage distribution shifts during read operations. The system uses this feedback information to dynamically adjust read level voltages and refine calibration parameters, ensuring that read operations maintain high accuracy even as voltage distributions change over time due to charge loss.

Inventive Principle:

Principle #23Feedback

Solution Approach 2:

The patent changes the parameter of calibration sequence order from conventional sequential (lowest to highest) to reverse sequential (highest to lowest). This parameter change fundamentally alters how read level voltages are established, allowing the system to account for charge loss effects more effectively and maintain higher read operation accuracy by processing higher voltage distributions first where charge loss impacts are most significant.

Inventive Principle:

Principle #35Parameter changes

3Loss of time

If reverse read calibration is implemented, then read overhead time is reduced and latency is reduced, but device complexity increases

Engineering Contradiction:

Improveread overhead timeVSAvoidcalibration process complexity

Core Design Contradiction:

Loss of timeVSDevice complexity

Solution Approach 1:

While reverse read calibration does increase the apparent complexity of the calibration process by inverting the conventional sequence, the patent manages this complexity through systematic algorithms and pre-computed lookup tables. The reverse ordering, while changing the process flow, follows a similar structured approach to conventional calibration, making the complexity manageable and not proportionally increasing device complexity.

Inventive Principle:

Principle #13The other way round (Inversion)

4Measurement precision

If read level voltage adjustments are made sequentially from lowest to highest distribution, then calibration can be performed, but latency increases

Engineering Contradiction:

Improvecalibration accuracyVSAvoidcalibration time

Core Design Contradiction:

Measurement precisionVSLoss of time

Solution Approach 1:

The patent inverts the conventional calibration sequence by processing threshold voltage distributions from highest to lowest instead of lowest to highest. This reversal allows the system to establish read levels for the most affected distributions (highest voltage ranges) first, where charge loss has the greatest impact, and then propagate these calibrated values downward. This inversion significantly reduces calibration time and latency while maintaining or improving accuracy compared to the sequential conventional approach.

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS20250174281A1Faster multi-cell read operation using reverse read calibrations

Publication Date: 2025.05.29 MICRON TECHNOLOGY INC

AI summary

A memory device includes a memory array of memory cells associated with a plurality of wordlines and control logic coupled with the memory array. The control logic determines a metadata value characterizing a first read level voltage of a first threshold voltage distribution of a subset of the memory cells. The control logic adjusts, based on the metadata value, a second read level voltage for a second threshold voltage distribution of the subset of the memory cells, wherein the first threshold voltage distribution is higher than the second threshold voltage distribution. The control logic causes, to perform an initial calibrated read of the subset of the memory cells, the adjusted second read level voltage to be applied to a wordline of the plurality of wordlines to read the second threshold voltage distribution.