Reverse Side III-Nitride Devices for High Voltage

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Solution Overview

Problem

The challenge in fabricating high voltage lateral group III-nitride devices is the difficulty in achieving thick GaN layers with low defect density on silicon substrates, which leads to issues like current collapse and reduced breakdown voltage due to high defect concentrations in nucleation and stress management layers.

Innovation Solution

A method involving a stack of III-nitride layers with passivation layers and conductive contacts, where the nucleation and stress management layers are removed, and a passivation layer is applied to the reverse surface to reduce defect density and enhance breakdown voltage, using a carrier wafer to maintain strain and facilitate high voltage operation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Length of stationary object

If heteroepitaxy is used to grow thick GaN layers on silicon substrates, then device thickness is improved, but defect density increases due to lattice and thermal mismatch

Engineering Contradiction:
ImproveGaN layer thicknessVSAvoiddefect density
Core Design Contradiction:
Length of stationary objectVSManufacturing precision

Solution Approach 1:

The device structure is segmented into two sides: the obverse side maintains the nucleation and stress management layers for strain control, while the reverse side has these layers removed and replaced with a passivation layer. This segmentation allows each side to optimize for its specific function without compromising the other.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The nucleation and stress management layers are selectively removed from the reverse side of the device. This extraction eliminates the defect sources from the high voltage region while preserving their strain management function on the obverse side where the 2DEG channel is formed.

Inventive Principle:
Principle #2Taking out (Extraction)

2Ease of manufacture

If nucleation and stress management layers are retained to manage strain, then manufacturing ease is improved, but device reliability deteriorates due to high defect concentrations causing current collapse and reduced breakdown voltage

Engineering Contradiction:
Improvestrain managementVSAvoidbreakdown voltage
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The device is divided into functional zones: the obverse side retains nucleation and stress management layers for strain control during fabrication, while the reverse side removes these layers and applies passivation to eliminate defect-related reliability issues in the high voltage region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The problematic nucleation and stress management layers are extracted from the reverse side where they would cause breakdown voltage reduction and current collapse, while their beneficial strain management function is preserved on the obverse side.

Inventive Principle:
Principle #2Taking out (Extraction)

3Reliability

If passivation layers are applied to reduce defect density, then device reliability is improved, but manufacturing complexity increases due to additional processing steps

Engineering Contradiction:
Improvebreakdown voltageVSAvoidprocessing steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of applying passivation to the entire device or only the obverse side, the method applies passivation specifically to the reverse side after removing the nucleation and stress management layers. This inverted approach targets the specific region where defects cause reliability issues without unnecessarily complicating other areas.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS10199217B2Methods of forming reverse side engineered III-nitride devices
Publication Date: 2019.02.05 TRANSPHORM TECHNOLOGY INC
  • US10199217B2 patent drawing
  • US10199217B2 patent drawing
  • US10199217B2 patent drawing

AI summary

Group III-nitride devices are described that include a stack of III-nitride layers, passivation layers, and conductive contacts. The stack includes a channel layer with a 2DEG channel, a barrier layer and a spacer layer. One passivation layer directly contacts a surface of the spacer layer on a side opposite to the channel layer and is an electrical insulator. The stack of III-nitride layers and the first passivation layer form a structure with a reverse side proximate to the first passivation layer and an obverse side proximate to the barrier layer. Another passivation layer is on the obverse side of the structure. Defected nucleation and stress management layers that form a buffer layer during the formation process can be partially or entirely removed.