Reverse T-Shaped FinFETs for High-Ge Mobility

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

The semiconductor industry faces challenges in forming high-concentration germanium films with low defect densities and adequate thickness for FinFETs, as the critical thickness of silicon germanium films decreases with increasing germanium percentage, making it difficult to use germanium in FinFET structures.

Innovation Solution

The method involves forming an epitaxial semiconductor region with a reversed T-shape between insulation regions in a semiconductor substrate, allowing for the growth of thick germanium-containing films with high germanium concentrations and reduced defects, and forming FinFETs with relaxed pitch requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If high germanium percentage is used in silicon germanium films, then electron mobility and hole mobility are improved, but critical thickness is reduced

Engineering Contradiction:
Improveelectron mobility and hole mobilityVSAvoidcritical thickness
Core Design Contradiction:
ReliabilityVSLength of moving object

Solution Approach 1:

The patent divides the film structure into multiple segments with different germanium concentrations. The buffer layer has lower germanium concentration (e.g., 0-20%) while the fin structure has higher germanium concentration (e.g., 40-80%). This segmentation allows each layer to be optimized independently, enabling thick fin structures with high germanium content without exceeding the critical thickness limit of the overall film stack.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies local quality by having different germanium concentrations in different regions of the film. The buffer layer uses low germanium concentration to provide a stable foundation, while the fin region uses high germanium concentration to achieve the desired mobility. This localized optimization resolves the contradiction by allowing high germanium content where needed while maintaining overall structural integrity.

Inventive Principle:
Principle #3Local quality

2Length of moving object

If thick germanium films are formed, then adequate thickness for FinFETs is achieved, but defect density increases

Engineering Contradiction:
Improvefilm thicknessVSAvoiddefect density
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The patent segments the film into a thin buffer layer and a thicker fin structure. The buffer layer (e.g., 10-50 nm thick) with low germanium content serves as a defect-filtering foundation, while the fin structure (e.g., 50-200 nm thick) with high germanium content provides the necessary thickness for FinFET operation. This segmentation enables achieving adequate thickness while maintaining low defect density in the active fin region.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent performs preliminary action by forming the buffer layer first to establish a low-defect foundation before growing the thicker fin structure. The buffer layer is grown with optimized conditions to minimize defects, and then the fin structure is grown on top. This preliminary preparation enables the subsequent thick film growth to maintain low defect density.

Inventive Principle:
Principle #10Preliminary action

3Ease of manufacture

If germanium films are formed on blanket silicon wafers, then conventional fabrication is used, but critical thickness is exceeded and defects increase

Engineering Contradiction:
Improveconventional fabricationVSAvoiddefect density
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces selective area growth to create local quality differences. Instead of forming a uniform thick germanium film across the entire wafer, the high-germanium-content fin structures are grown only in specific regions defined by masks and etch holes. This localized growth approach enables conventional fabrication processes to be used while avoiding the defect problems associated with blanket growth of thick high-germanium films.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent segments the growth process into discrete steps: forming isolation regions, creating etch holes, selective epitaxial growth in specific areas, and removing masks. This segmented approach to fabrication on blanket silicon wafers allows the critical thickness to be maintained in the active regions while using conventional processes, avoiding the defect density problems of blanket growth.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of FinFETs with high drive currents and reduced defects, as well as relaxed pitch requirements for STI regions, facilitating the use of high germanium percentages in FinFETs without exceeding critical thickness limits.

Implementation Method 1

An epitaxial semiconductor region having a reversed T-shape is then formed

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Data Source

PatentUS8455321B2Multiple-gate transistors with reverse T-shaped fins
Publication Date: 2013.06.04 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US8455321B2 patent drawing
  • US8455321B2 patent drawing
  • US8455321B2 patent drawing

AI summary

A method of forming an integrated circuit structure includes forming a first insulation region and a second insulation region in a semiconductor substrate and facing each other; and forming an epitaxial semiconductor region having a reversed T-shape. The epitaxial semiconductor region includes a horizontal plate including a bottom portion between and adjoining the first insulation region and the second insulation region, and a fin over and adjoining the horizontal plate. The bottom of the horizontal plate contacts the semiconductor substrate. The method further includes forming a gate dielectric on a top surface and at least top portions of sidewalls of the fin; and forming a gate electrode over the gate dielectric.