Reversed Stack MTJ Free Layer Protection

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional manufacturing processes for magnetic tunneling junctions in MRAM cells are prone to plasma damage and contamination of the free layer during etching, leading to defects in the cells.

Innovation Solution

Reversing the order of the film stack to place the free layer on the bottom, allowing for separate etching and forming a protective sidewall barrier to prevent damage and contamination, while also using in situ encapsulation to minimize exposure to the ambient environment during processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If the conventional film stack order is used with the free layer on top, then the manufacturing process follows traditional sequencing, but the free layer is susceptible to plasma damage and contamination during etching

Engineering Contradiction:
Improvetraditional manufacturing sequencingVSAvoidfree layer integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent inverts the conventional film stack order by placing the free layer at the bottom instead of on top. This reversal allows the free layer to be processed and protected before subsequent etching steps, eliminating plasma damage and contamination issues that occur when the free layer is positioned on top during traditional manufacturing sequences.

Inventive Principle:
Principle #13The other way round (Inversion)

2Reliability

If the free layer is etched separately with protective sidewall barriers, then plasma damage and contamination are reduced, but the manufacturing process complexity increases

Engineering Contradiction:
Improvefree layer protectionVSAvoidmanufacturing process steps
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent forms protective sidewall barriers and performs etching operations on the free layer before processing other layers in the stack. This preliminary action approach allows the free layer to be protected in advance, preventing plasma damage and contamination during subsequent manufacturing steps while maintaining process control.

Inventive Principle:
Principle #10Preliminary action

3Object-affected harmful factors

If in situ encapsulation is used to minimize ambient exposure, then contamination is reduced, but the processing sequence becomes more complex

Engineering Contradiction:
Improveambient contaminationVSAvoidprocessing sequence
Core Design Contradiction:
Object-affected harmful factorsVSDevice complexity

Solution Approach 1:

The patent employs in situ encapsulation techniques that create a protected environment during processing, minimizing exposure of the free layer and other sensitive layers to ambient contamination. This approach maintains a controlled atmosphere throughout the manufacturing sequence, reducing harmful environmental factors.

Inventive Principle:
Principle #39Inert atmosphere (Inert environment)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach effectively reduces plasma damage and contamination, ensuring reliable data storage by maintaining a significant resistance difference between the two states of the MRAM cells, thus enhancing the performance and reliability of the MRAM cells.

Implementation Method 1

current flows through the insulating barrier by quantum mechanical tunneling

Methodology Applied
Scientific EffectQuantum mechanical tunneling:

Implementation Method 2

The resistance of the MTJ depends on the relative orientation of magnetic elements in the two ferromagnetic layers

Methodology Applied
Scientific EffectMagnetoresistance: Magnetoresistance

Data Source

PatentUS11258007B2Reversed stack MTJ
Publication Date: 2022.02.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11258007B2 patent drawing
  • US11258007B2 patent drawing
  • US11258007B2 patent drawing

AI summary

An integrated circuit device includes a substrate and a magnetic tunneling junction (MTJ). The MTJ includes at least a pinned layer, a barrier layer, and a free layer. The MTJ is formed over a surface of the substrate. Of the pinned layer, the barrier layer, and the free layer, the free layer is formed first and is closest to the surface. This enables a spacer to be formed over a perimeter region of the free layer prior to etching the free layer. Any damage to the free layer that results from etching or other free layer edge-defining process is kept at a distance from the tunneling junction by the spacer.