Reversed Stud Bump Through Via Interconnections for Thin PoP Packages

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Solution Overview

Problem

Conventional Package on Package (PoP) structures using solder balls as connectors face limitations in thinness and number of input/output connections, requiring increased board area or thickness to support higher I/O devices, which restricts the miniaturization of integrated circuit devices.

Innovation Solution

The use of reversed stud bump through via assemblies (TVAs) with redistribution layers on both surfaces of the interconnection layer, formed using wire bonding technology, which allows for vertical connections and reduces the need for external connector traces on the system board, enabling thinner packages and supporting wide I/O devices with numerous connections.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If conventional solder balls are used as PoP connectors, then the structure is simple and easy to manufacture, but the package thickness increases and the number of I/O connections is limited

Engineering Contradiction:
Improveease of manufactureVSAvoidpackage thickness
Core Design Contradiction:
Ease of manufactureVSLength of stationary object

Solution Approach 1:

The patent changes the connector type from spherical solder balls to cylindrical stud bumps with integrated tails, fundamentally altering the geometric parameters. This enables the connector to extend through the substrate thickness, reducing the required package thickness while maintaining connection functionality. The stud bump structure allows vertical penetration through the interconnection layer, eliminating the need for additional thickness to accommodate connector height.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The invention transitions from a horizontal connector arrangement (solder balls on the surface) to a vertical through-via arrangement (stud bumps penetrating the substrate). This dimensional change allows connections to be made through the thickness direction rather than requiring surface area, thereby reducing package thickness while supporting high I/O counts.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Ease of manufacture

If conventional solder balls are used as PoP connectors, then the manufacturing process is simple, but the number of I/O connections cannot exceed certain limits without increasing board area

Engineering Contradiction:
Improveease of manufactureVSAvoidnumber of I/O connections
Core Design Contradiction:
Ease of manufactureVSQuantity of substance

Solution Approach 1:

The stud bump connector performs multiple functions: it provides mechanical connection, electrical conduction, and acts as a through-via trace all in one structure. The integrated tail portion serves as both the connector and the trace, eliminating the need for separate trace structures on the board. This multi-functionality enables high I/O density without proportionally increasing board area or manufacturing complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Solution Approach 2:

The patent merges the connector and the trace into a single integrated structure. The stud bump body provides the connection point while the tail extends to form the trace path, combining what were previously separate elements (connector plus trace routing) into one unified component. This integration allows numerous connections to be made within the same board footprint.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If the number of I/O connections is increased to support wide I/O devices, then the connectivity capability improves, but the package area or thickness must be increased

Engineering Contradiction:
Improveconnectivity capabilityVSAvoidpackage area
Core Design Contradiction:
Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

By switching from surface-mounted solder balls to vertically-oriented stud bump through-vias, the patent utilizes the thickness dimension for routing connections. This allows a high density of connections to be achieved by stacking connection paths vertically rather than spreading them horizontally across the board surface, thereby maintaining compact package area while supporting wide I/O devices with 1200+ connections.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

4Device complexity

If conventional solder balls are used, then the connector structure is simple, but signal lengths between components are longer resulting in slower signal speeds

Engineering Contradiction:
Improveconnector structure complexityVSAvoidsignal speed
Core Design Contradiction:
Device complexityVSSpeed

Solution Approach 1:

Instead of having connectors on the outer surfaces with traces routing through the substrate (conventional approach), the patent inverts the structure by having connectors penetrate through the substrate from one surface to the other. This reversal places the connection points at both ends of the through-via, minimizing the signal path length through the interconnection layer and reducing overall trace lengths, thereby improving signal speed despite increased connector structural complexity.

Inventive Principle:
Principle #13The other way round (Inversion)

Data Source

PatentUS9293449B2Methods and apparatus for package on package devices with reversed stud bump through via interconnections
Publication Date: 2016.03.22 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9293449B2 patent drawing
  • US9293449B2 patent drawing
  • US9293449B2 patent drawing

AI summary

Methods and apparatus for package on package structures having stud bump through via interconnections. A structure includes an interconnect layer having a plurality of through via assemblies each including at least one stud bump are formed on conductive pads; and encapsulant surrounding the through via assembly, a first redistribution layer formed over a surface of the encapsulant and coupled to the through via assemblies and carrying connectors, and a second redistribution layer over interconnect layer at the other end of the through via assemblies, the through via assemblies extending vertically through the interconnect layer. In an embodiment the interconnect layer is mounted using the connectors to a lower package substrate to form a package on package structure. A first integrated circuit device may be mounted on the second redistribution layer of the interconnect layer. Methods for forming the interconnect layer and the package on package structures are disclosed.