Semiconductor Patterning with Reversible Hardmask for Mixed-Density Layouts

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Solution Overview

Problem

The increasing complexity of forming patterns with various shapes, sizes, and densities in semiconductor memory devices poses challenges in process difficulty and margin maximization, particularly as feature sizes decrease.

Innovation Solution

A pattern forming method involving the creation of a hardmask structure with multiple layers, photoresist patterns, and reversible hardmask patterns to transfer shapes accurately between different areas of a semiconductor memory device, allowing for the formation of island patterns and dam structures in high-density areas and line patterns in low-density areas, using techniques like EUV lithography.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional lithography methods are used to form patterns with various shapes, sizes, and densities, then the feature size decreases and integration increases, but the process difficulty increases and process margin decreases

Engineering Contradiction:
Improvepattern densityVSAvoidprocess difficulty
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The substrate is divided into multiple areas (first area with high pattern density, second area with low pattern density), and each area is processed with appropriate patterning methods. The method segments the patterning process into multiple steps including forming photoresist patterns, upper hardmask patterns, and reversible hardmask patterns in different areas to achieve optimal results for each density regime

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different patterning approaches are applied to different areas based on their specific requirements. The first area uses a combination of engraved and embossed patterns with reversible hardmask, while the second area uses simpler embossed patterns, optimizing each local region's pattern formation process

Inventive Principle:
Principle #3Local quality

2Adaptability or versatility

If multiple pattern types with different shapes and sizes are formed simultaneously, then design flexibility increases, but manufacturing precision becomes more difficult to maintain

Engineering Contradiction:
Improvedesign freedomVSAvoidpattern formation precision
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The method performs preliminary actions by forming multiple hardmask layers and photoresist patterns before the final etching step. The upper hardmask pattern and reversible hardmask pattern are prepared in advance with specific shapes and sizes, ensuring that when etching occurs, the patterns are transferred with high precision to the underlying layer

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Multiple hardmask layers and photoresist patterns serve as intermediary structures that facilitate the transfer of complex patterns to the final layer. These intermediary patterns act as templates that guide the etching process, ensuring precise pattern formation even for complex shapes and sizes

Inventive Principle:
Principle #24Intermediary (Mediator)

3Length of moving object

If feature size is reduced to increase integration, then device capacity increases, but process margin decreases and defects increase

Engineering Contradiction:
Improvefeature sizeVSAvoidprocess margin
Core Design Contradiction:
Length of moving objectVSReliability

Solution Approach 1:

The method transitions from two-dimensional planar patterning to three-dimensional multi-layer hardmask structures. By adding vertical dimension with multiple hardmask layers (lower hardmask layer, main hardmask layer, upper hardmask layer) and using reversible hardmask filling, the process achieves better control over small feature sizes while maintaining process margin

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

Data Source

PatentUS20240266170A1Pattern forming method, semiconductor memory device, and method of manufacturing the same
Publication Date: 2024.08.08 SAMSUNG ELECTRONICS CO LTD
  • US20240266170A1 patent drawing
  • US20240266170A1 patent drawing
  • US20240266170A1 patent drawing

AI summary

A method of forming a pattern includes forming an etch target layer over a substrate including a first area and a second area, forming a hardmask structure over the etch target layer, forming a photoresist pattern including a first photoresist pattern including an engraved pattern located in the first area and a second photoresist pattern including an embossed pattern located in the second area, forming an upper hardmask pattern including a plurality of openings, forming a reversible hardmask pattern filling the plurality of openings in the first area, and forming a feature pattern including a first pattern located in the first area and a second pattern located in the second area, wherein the first pattern includes a plurality of island patterns and a dam structure planarly surrounding the plurality of island patterns.