Reversible Top-Bottom MEMS Package with RF Shielding
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Solution Overview
Problem
MEMS devices face challenges in aligning and acoustically coupling top port applications, leading to performance issues and increased costs due to misalignment and slow acoustic coupling, as well as difficulties in flip chip designs where electrical interconnects point away from the port, making contact with the substrate difficult.
Innovation Solution
A reversible top and bottom port MEMS package system where the acoustic port can be positioned on either the top or bottom substrate, utilizing a semiconductor device with a base substrate, cover substrate, and side members forming an RF shield, with wirebonds creating a loop that contacts metal traces on both substrates for secure electrical connections.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If the port is on the top substrate, then the acoustic port can receive sound wave input, but alignment with the MEMS device is challenging and expensive
Solution Approach 1:
The patent inverts the conventional top-port configuration by implementing a bottom-port design where the acoustic port is located on the bottom substrate instead of the top. This inversion eliminates the alignment challenges between the acoustic port and MEMS device, as the port naturally aligns with the sound source direction in bottom-port applications.
2Ease of operation
If the MEMS device is coupled acoustically to the lid, then the acoustic port can be positioned, but the coupling process is slow and expensive
Solution Approach 1:
The acoustic port is pre-positioned on the bottom substrate during the substrate fabrication process, before the MEMS device is assembled. This preliminary positioning eliminates the need for slow and expensive post-assembly acoustic coupling processes, as the port is already correctly positioned to receive sound wave input.
3Manufacturing precision
If the port is on the bottom substrate, then alignment is easier, but the electrical interconnects point away from the port making contact difficult
Solution Approach 1:
The patent segments the electrical interconnection path from the acoustic port location. The wirebonds are routed to contact the MEMS device at its electrical interface location, separate from the acoustic port position on the bottom substrate. This segmentation allows the acoustic port to be optimally positioned for alignment while the electrical connections are made at the appropriate interface points.
Solution Approach 2:
Wirebonds serve as intermediaries between the bottom substrate and the MEMS device. These wirebonds extend from the bottom substrate to make electrical contact with the MEMS device, bridging the gap between the acoustic port location and the electrical interface, thereby enabling both acoustic and electrical connections without conflict.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for flexible port placement, improving acoustic performance and reducing costs by enabling efficient alignment and acoustic coupling, while maintaining secure electrical connections and preventing external static interference through a Faraday cage effect.
Implementation Method 1
at least one wirebond has a first end attached to the first die and a second end attached to a metal trace of the base substrate. The at least one wirebond forms a loop wherein a top section of the loop contacts a metal trace of the cover substrate.
Implementation Method 2
Side members are coupled to ground planes on the base substrate and cover substrate to form an RF shield around the first die.
Data Source
AI summary
A semiconductor device has a base substrate having a plurality of metal traces and a plurality of base vias. An opening is formed through the base substrate. A cover substrate having a plurality of metal traces and a plurality of cover vias is provided. A first die is attached to the first surface of the substrate and positioned over the opening. Side members are coupled to ground planes on the base substrate and cover substrate to form an RF shield around the first die. At least one wirebond having a first end attached to the first die and a second end attached to a metal trace of the base substrate is provided. The at least one wirebond forms a loop wherein a top section of the loop contacts a metal trace of the cover substrate.


