Reversible Write Protection for Serial Non-Volatile Memory
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Solution Overview
Problem
Conventional non-volatile memory devices lack a convenient and reliable reversible software write protection mechanism, limiting flexibility for developers to modify system code while ensuring reliable data protection for end users.
Innovation Solution
A non-volatile memory device with a serial interface that employs specific unlock and lock signal sequences applied to address and data pins to transition between locked and unlocked states, utilizing a state machine and protection circuit logic to ensure reliable access control, allowing for reversible software write protection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If permanent software write protection is enabled, then data protection reliability is improved, but system flexibility and adaptability deteriorate
Solution Approach 1:
The patent implements a reversible write protection mechanism that transitions from static permanent protection to dynamic reversible protection. The write protection state can be changed from locked to unlocked through specific unlock sequences, allowing the system to adapt between protection modes based on operational needs while maintaining security when locked.
Solution Approach 2:
The patent changes the parameter of write protection reversibility by introducing unlock sequences that modify the protection state. The system can switch between protected and unprotected states by applying specific signal sequences, thereby changing the protection parameter from fixed to variable based on operational requirements.
2Reliability
If hardware write protection is used, then data protection reliability is improved, but ease of operation deteriorates
Solution Approach 1:
The patent replaces the mechanical/hardware write protection mechanism (WP pin physical connection) with a software-based reversible protection mechanism. Instead of requiring physical pin manipulation, the system uses software-controlled unlock sequences to achieve write protection, thereby improving ease of operation while maintaining reliability.
Solution Approach 2:
The system implements self-service write protection where the microcontroller automatically manages the write protection state through software commands. The unlock sequences are processed internally by the device, eliminating the need for external hardware intervention and simplifying operation for end users.
3Adaptability or versatility
If reversible software write protection is implemented, then system flexibility is improved, but device complexity increases
Solution Approach 1:
The patent implements a universal unlock sequence mechanism that handles multiple protection scenarios through a single standardized approach. The same unlock sequence logic applies to different memory regions and protection states, reducing the need for multiple specialized mechanisms and thereby limiting the increase in device complexity despite the added functionality.
Data Source
AI summary
A serial memory device having a non-volatile memory array including a plurality of memory blocks, one or more said plurality of blocks being capable of being placed in a locked or an unlocked state upon receiving designated lock or unlock signal sequences is provided. The unlock signal sequences comprises at least two sequential signal sequences: a first unlock sequence, which has 1 to 7 signal bits, is applied to one of address input pins or a logic low enabled write-protection input pin and a second unlock sequence follows the first unlock signal sequence and is applied to a serial data access pin. The memory device further comprising a control logic circuit block coupled to a write-protection circuit block to provide means to identify the designated lock and unlock signal sequences and to set a protection state in a security area.