Rewritable In-Place Memory for Data Storage
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Solution Overview
Problem
Current data storage technologies face challenges with the longevity and data access speed of flash memory, which is exacerbated by complex data management due to its page/sector addressability and the need for continuous power in volatile memories, limiting their applicability in modern computing devices.
Innovation Solution
Implementing a data storage device with a non-volatile, bit-addressable, rewritable in-place memory that uses a selection layer instead of transistors, allowing for faster data access and reduced power consumption, combined with a selection module that optimizes data management and access by intelligently managing buffers and non-volatile memory.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If flash memory is used for data storage, then data retention capability is improved, but data access speed deteriorates
Solution Approach 1:
The patent segments the memory system into two distinct parts: volatile memory (SRAM/DRAM) for fast data access and non-volatile flash memory for data retention. The controller intelligently manages data placement between these segments, allowing simultaneous optimization of both speed and retention capabilities.
2Speed
If volatile memory is used for fast data access, then data access speed is improved, but power consumption increases due to continuous power requirement
Solution Approach 1:
The system employs periodic data transfer between volatile and non-volatile memory based on access patterns. Frequently accessed data remains in volatile memory while less frequently accessed data is transferred to non-volatile memory, reducing the time volatile memory needs to maintain data and thus reducing overall power consumption.
3Ease of manufacture
If flash memory uses page/sector addressability, then manufacturing complexity is reduced, but data management complexity increases
Solution Approach 1:
The controller acts as an intermediary layer between the host system and the flash memory's page/sector structure. It translates byte-addressable host requests into page/sector operations, shielding the host from flash memory's complex addressing scheme while maintaining ease of manufacture benefits.
4Quantity of substance
If transistor-based memory cells are used, then data storage capability is improved, but physical size increases
Solution Approach 1:
The patent merges multiple memory cells into larger pages and blocks, allowing efficient parallel operations. This consolidation reduces the overall physical footprint by minimizing overhead structures and enabling more compact memory array layouts while maintaining storage capability.
Data Source
AI summary
A data storage device can have at least a buffer memory, a selection module, and a non-volatile memory. The buffer memory and non-volatile memory may consist of different types of memory while the non-volatile memory has one or more rewritable in-place memory cells. The buffer memory and non-volatile memory may each store data associated with a pending data request as directed by the selection module until a settle time of the rewritable in-place memory cell has expired.