Rewritable Behavior Mappings for DPU Fault Correction
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Solution Overview
Problem
Existing methods for addressing design faults in Data Processing Units (DPUs) are time-consuming and incomplete, as they require reprogramming compilers to avoid problematic instructions, which does not entirely solve the issue and affects uncompiled code.
Innovation Solution
A mechanism using rewritable storage circuitry to store mappings between instruction identifiers and behavior modifications, allowing dynamic control of DPU behavior through selection and control circuitry to modify default behaviors in response to specific instructions or sequences, enabling inhibition of improper execution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the compiler is reprogrammed to avoid problematic instructions, then the reliability of code execution is improved, but the manufacturing complexity and time required increases significantly
Solution Approach 1:
The patent introduces an intermediary component (patch circuitry or mapping storage) between the instruction stream and the execution units. This intermediary intercepts problematic instructions and redirects them to alternative execution paths or raises exceptions, thereby improving reliability without complicating the compiler. The mapping storage acts as a mediator that translates problematic instructions into safe operations.
Solution Approach 2:
The patent implements preliminary action by pre-configuring mapping storage with mappings that identify problematic instructions and their corresponding corrections or alternatives. Before execution occurs, the system has already prepared the necessary mappings to handle known problematic instructions, allowing immediate correction without requiring compiler intervention or complex runtime analysis.
2Reliability
If the compiler is reprogrammed to avoid problematic instructions, then execution reliability is improved, but the time required to implement the solution increases significantly
Solution Approach 1:
The system performs preliminary action by pre-loading mapping information into rewritable storage circuitry during manufacturing or initialization. This allows the system to immediately handle problematic instructions without requiring time-consuming compiler reprogramming or runtime analysis. The mappings are prepared in advance and can be applied instantly when problematic instructions are encountered.
Solution Approach 2:
The patent uses copying by creating a mapping from the problematic instruction identifier to a corrected version or alternative operation. Instead of modifying the original instruction or requiring complex compiler changes, the system creates a simple mapping copy that redirects execution. This mapping can be stored in rewritable storage and applied rapidly without lengthy implementation processes.
3Reliability
If compiler reprogramming is used to avoid problematic instructions, then execution reliability is improved, but the adaptability to different code bases is reduced
Solution Approach 1:
The patent implements universality by designing a mapping storage system that can handle multiple types of problematic instructions through a unified mechanism. The rewritable storage can store mappings for various instruction types and problematic patterns, making the solution universally applicable to different code bases and instruction sets without requiring separate compiler modifications for each case.
Solution Approach 2:
The mapping storage acts as a universal intermediary that sits between any instruction stream and the execution units. It can intercept and correct problematic instructions from any source (compiled or uncompiled code) without requiring the code to be recompiled with special knowledge. This intermediary approach maintains adaptability across different code bases while ensuring reliability.
4Ease of manufacture
If a fixed hardware design is used, then manufacturing simplicity is maintained, but the ability to correct design faults dynamically is lost
Solution Approach 1:
The patent applies dynamics by incorporating rewritable storage circuitry into the fixed hardware design. This allows the mapping information to be dynamically updated or modified after manufacturing, enabling the system to adapt to newly discovered faults or changing requirements. The hardware remains structurally simple and easy to manufacture, but gains dynamic reconfigurability through the rewritable storage component.
Data Source
AI summary
An apparatus is provided comprising rewritable storage circuitry to store at least one mapping between at least one instruction identifier and a behaviour modification. Selection circuitry selects, from the rewritable storage circuitry, a selected mapping having an instruction identifier that identifies a received instruction. The received instruction causes a data processing unit to perform a default behaviour. Control circuitry causes the data processing unit to behave in accordance with the default behaviour modified by the behaviour modification.