Fuse Elements Based on Two-Terminal Re-Writable Non-Volatile Memory
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Solution Overview
Problem
Conventional fuse elements in non-volatile memory technology are susceptible to read disturb effects, which corrupt the resistive values of memory elements due to frequent access, leading to reduced effectiveness over time.
Innovation Solution
The design incorporates a two-terminal memory element with an electrolytic tunnel barrier and mixed valence conductive oxide, allowing for reversible conductivity changes via voltage manipulation, and a restore circuit to correct resistive state corruption by applying specific voltages during recovery operations.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If non-volatile memory elements are used in fuse elements, then data retention is improved, but read disturb effects increase due to higher read frequency
Solution Approach 1:
The patent applies preliminary action by performing a recovery operation before the resistive value becomes significantly corrupted. The restore circuit proactively corrects minor disturbances by applying a recovery voltage sequence that restores the memory element to its original programmed state, preventing accumulation of read disturb effects
Solution Approach 2:
The patent implements feedback through a restore circuit that continuously monitors the resistive value of the memory element and applies corrective voltages when disturbance is detected. The circuit uses the current state of the memory element to determine whether restoration is needed, creating a closed-loop system that maintains data integrity
2Speed
If memory elements are accessed frequently for reading, then data availability is improved, but resistive value corruption increases over time
Solution Approach 1:
The restore circuit provides continuous feedback monitoring of the memory element's resistive value. When a read operation is performed, the circuit detects any change in resistive value and automatically initiates a recovery operation to restore the original state, allowing frequent reads without compromising reliability
Solution Approach 2:
The system performs self-service by automatically detecting and correcting its own errors. The restore circuit monitors the memory element and autonomously applies recovery voltages to correct read disturb effects, eliminating the need for external intervention to maintain data integrity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively mitigates read disturb effects by restoring original resistive values, enhancing the reliability and longevity of memory elements in non-volatile memory systems.
Implementation Method 1
A voltage drop across the electrolytic tunnel barrier causes an electrical field within the mixed valence conductive oxide that is strong enough to move oxygen ions out of the mixed valence conductive oxide and into the electrolytic tunnel barrier
Implementation Method 2
A voltage drop across the electrolytic tunnel barrier causes an electrical field within the mixed valence conductive oxide
Implementation Method 3
a restore circuit to correct resistive state corruption by applying specific voltages during recovery operations
Data Source
AI summary
A margin restore fuse element is described, including a latch configured to store data, a first memory element coupled to the latch and configured to store a first resistive value, a second memory element coupled to the latch and configured to store a second resistive value, a restore circuit coupled to the latch, the first memory element, and the second memory element, the restore circuit being configured to perform a restore data operation to substantially restore the first and second memory elements to the first and second resistive values, respectively. The latch, restore circuit, and other circuitry can be formed FEOL on a substrate (e.g., a semiconductor wafer) as part of a microelectronics fabrication process and the fuse element and memory elements can be formed BEOL over the substrate as part of another microelectronics fabrication process. The fuse and memory elements can be included in a two-terminal non-volatile memory cell.